Abstract: A method and system that distributes floating licenses over a communication network, where the licensed services must be able to start without delay. The system comprises of at least one license server that stores and manages software-feature licenses and a set of client devices that are connected to the license server over a communication network and that lease licenses for licensed features from the server temporarily. The license distribution method is designed for licensed real-time features or services, typically with a short life time. Such real-time services are started and stopped frequently and must not be imposed with an additional delay for requesting a license from the license server. Examples for such services are voice and video calls. This document describes a method and system to solve this license distribution problem for real-time services.
Abstract: Integrated internal power supply with a power inlet connector arranged to protrude through a housing of an end-use equipment, and having internal circuitry potted in a thermally conducting material. A vent path is provided so that a component such as a large capacity electrolytic capacitor can vent surplus fluid, e.g. electrolyte and/or gas. The power supply has a standardized ‘footprint’ and may be mounted directly onto a circuit board in the end-use equipment. The supply is preferably assembled by mounting a board holder on an internal circuit board, mounting a clip on the power inlet connector, mounting the internal circuit board in a case, plugging a vent hole in the internal circuit board, filling the case with potting compound, baking the power supply, preferably at 100° C. for 10 minutes, and then unplugging the vent hole.
Type:
Application
Filed:
March 24, 2004
Publication date:
September 29, 2005
Applicant:
Patton Electronics, Co.
Inventors:
Michael Martin, Bryan Dubois, Kenneth Maurer
Abstract: A parallel processing system or processor has a computing architecture including a plurality of execution units to repeatedly distribute instruction streams within the processor via corresponding buses, and a series of processing units to access the buses and selectively execute the distributed instruction streams. The execution units each retrieve an instruction stream from an associated memory and place the instruction stream on a corresponding bus, while the processing units individually may select and execute any instruction stream placed on the corresponding buses. The processing units autonomously execute conditional instructions (e.g., IF/ENDIF instructions, conditional looping instructions, etc.), whereby an enable flag within the processing unit is utilized to indicate occurrence of conditions specified within a conditional instruction and control selective execution of instructions in response to occurrence of those conditions.