Abstract: This is a method and apparatus for interleaving data in a VRAM. A video card is provided which has less VRAMs than the equivalent prior art video cards which have the same speed and same size data paths. Herein is utilized non symmetrical column interleaving whereby each pixel on the display having coordinates X, and Y is mapped into the VRAMS rows and columns R and C according to the formula:R=[TTI of 2(Y/3)]+P1C=LNB{[(TTI of Y mod 3) 341]+[TTI of X/3]}where:TTI means truncation to an integerLNB means lower nine order bits of P1 is "1" if [((X>511) and (Y mod 3=1)) or (Y mod 3=2)]Utilizing the asymmetrical column interleaving of the method and apparatus the rows of each VRAM are completely filled and one can produce a video card for 1024 by 768 display with 8 bits per pixel utilizing three 2 megabit VRAMS.