Patents Assigned to Peregrine Semiconductor Corp.
  • Patent number: 6090648
    Abstract: A method of making a self-aligned, integrated resistor load on ultrathin silicon on sapphire film, with the method being used to manufacture an FET and a resistor load. While the film can be used, for example, to manufacture a four transistor SRAM, it is not limited to such applications. The method encompasses an integral resistor load which can be integrated with analog components or formed as part of an integrated circuit for electrostatic discharge (ESD) circuitry, or the like. The resistor load can be integrally formed from the same silicon island which forms a corresponding transistor. Because the resistor load can be made from, and integral with, the ultra thin silicon material, it can be automatically self-aligned to the transistor. The self-aligned, integrated resistor loads are comprised of an insulating substrate, with a layer of silicon formed on the insulating substrate.
    Type: Grant
    Filed: August 31, 1998
    Date of Patent: July 18, 2000
    Assignee: Peregrine Semiconductor Corp.
    Inventors: Ronald E. Reedy, Mark L. Burgener
  • Patent number: 5973363
    Abstract: An integrated circuit comprising an insulating substrate; a layer of silicon formed on said insulating substrate; a p-channel transistor and an n-channel transistor formed in said silicon layer and interconnected in a CMOS circuit; wherein the ratio of transistor p-channel length to transistor n-channel length in the CMOS circuit is less than or equal to one.
    Type: Grant
    Filed: March 9, 1995
    Date of Patent: October 26, 1999
    Assignee: Peregrine Semiconductor Corp.
    Inventors: David R. Staab, Richard M. Greene, Mark L. Burgener, Ronald E. Reedy
  • Patent number: 5930638
    Abstract: A diffused resistor and a method for making the diffused resistor are disclosed. The diffused resistor is formed in a substantially pure portion of the thin semiconductor layer that is formed on an insulating substrate. The thin semiconductor layer has low a number of defects and mid-band gap states. This portion may be located in an electrically isolated region of the thin semiconductor layer. A resistive region is used to provide the resistance of the diff-used resistor. Contact regions are provided continguous with the the resistive region. The diff-used resistor can be formed by themselves or in conjunction with other circuit elements, such as a MOSFET, for example. Accordingly, also disclosed is a method for making the diffused resitor in conjunction with a MOSFET. The diffused resistor and the MOSFET are formed in electrically isolated semiconductor islands. The electrically isolated semiconductor islands are formed from the high quality thin semiconductor layer.
    Type: Grant
    Filed: August 19, 1997
    Date of Patent: July 27, 1999
    Assignee: Peregrine Semiconductor Corp.
    Inventors: Ronald E. Reedy, Mark L. Burgener
  • Patent number: 5920233
    Abstract: An apparatus and method for reducing spurious sidebands in the tuning signal of phase locked loop frequency synthesizers and phase locked loops is disclosed. The frequency synthesizer includes an oscillator, a divider, a difference circuit and a sampling circuit. The oscillator produces a variable frequency oscillator signal in response to an applied tuning signal. The divider divides the variable frequency oscillator signal by a division factor to produce a reduced frequency signal. The difference circuit receives the reduced frequency signal to produce a difference signal corresponding to the phase difference between the reference signal and the reduced frequency signal. The sampling circuit intermittently samples the difference signal in response to a timing signal to produce a tuning signal which approaches a DC characteristic. The tuning signal serves to adjust the oscillator frequency in a direction to diminish phase differences in the reference signal and the reduced frequency signal.
    Type: Grant
    Filed: November 18, 1996
    Date of Patent: July 6, 1999
    Assignee: Peregrine Semiconductor Corp.
    Inventor: Paul A. Denny