Patents Assigned to Philips Electronics North America Corp.
  • Patent number: 6260031
    Abstract: A code compaction based on macro substitutions is presented wherein the choice of possible macro substitutions is guided by an evolutionary algorithm process. In a preferred embodiment, a random population of sets of macro substitutions are generated and a compaction effectiveness is evaluated for each set. This random population is partitioned into pairs of “parents”, and each pair of parents produce a pair of “offspring”. The effectiveness of the compaction provided by each of the offspring is evaluated, and a “survival of the fittest” algorithm is applied to identify the individuals that have the best compaction effectiveness. These preferred individuals are partitioned into pairs of parents who produce pairs of offspring, and the most compaction-effective individuals are selected to be parents for the next generation. This process continues until subsequent generations show insignificant improvement, and the best individual is selected as the solution.
    Type: Grant
    Filed: December 21, 1998
    Date of Patent: July 10, 2001
    Assignee: Philips Electronics North America Corp.
    Inventors: J. David Schaffer, Keith E. Mathias, Larry J. Eshelman
  • Patent number: 6255210
    Abstract: A method for fabricating inter-metal oxide in semiconductor devices and semiconductor devices is provided. The method begins by providing a semiconductor substrate having a plurality of patterned conductive features. The method then moves to where a high density plasma (HDP) operation is performed and is configured to deposit an oxide layer over the plurality of patterned conductive features. The HDP operation includes a deposition component and a sputtering component. The deposition component is driven by a deposition gas and the sputtering component is driven by a sputtering gas. The HDP operation forms oxide pyramids over the plurality of patterned conductive features. The method now moves to where the deposition gas is removed to close off the deposition component in the HDP operation. Now, the HDP operation is run with the sputtering gas while retaining the sputtering component.
    Type: Grant
    Filed: June 25, 1999
    Date of Patent: July 3, 2001
    Assignee: Philips Electronics North America Corp.
    Inventors: Rao V. Annapragada, Milind G. Weling
  • Patent number: 6252486
    Abstract: A low profile magnetic component such as an inductor or transformer includes a core and a planar magnetic winding body having a dense, rigid structure composed of a stack of individual winding patterns separated by insulating layers, and a binder/filler material. The input and output termini of the individual winding patterns are revealed in a side face of the winding body, where they are interconnected with a plated metallization. Such structures may be mounted onto a PC board, and are useful, for example, in electronic ballasts for the lighting industry.
    Type: Grant
    Filed: June 13, 1997
    Date of Patent: June 26, 2001
    Assignee: Philips Electronics North America Corp.
    Inventor: Ronald Wolf
  • Publication number: 20010004230
    Abstract: An air-wound, coil-type, passive inductor includes a surface which allows the coil to be picked-up using a vacuum probe of a head of a pick-an-place machine and the surface does not interfere with adjusting the spacing between the loops of the coil for tuning the coil after the coil is attached to a circuit board. Terminal ends of the coil are placed on solder paste on interconnection pads on the circuit board, then the board is heated to reflow the solder, and then washed to remove the flux contained in the solder paste. The surface may be adapted to be removed or at least degraded by the heating, or the washing, or afterwards by a mechanical method of removal without damaging the coil.
    Type: Application
    Filed: February 1, 2001
    Publication date: June 21, 2001
    Applicant: Philips Electronics North America Corp.
    Inventor: David H. Thibado
  • Publication number: 20010003829
    Abstract: In a video server, multimedia data for a production is archived with data blocks for a video disk file and data blocks for audio disk files and data blocks for auxiliary disk files all intermixed together in a single tape file, in approximately the same order required for producing a multimedia data stream. During restoring of the production, as the disk files are being copied to disk storage systems from the tape file, the data may be retrieved from the same disk files and played as a multimedia data stream as soon as enough information is available in the files to form the stream. Disk files are striped across a multitude of disk files systems, by a commutator and a multitude of input/output units share access to all the files in all the disk file systems, for example, using a periodically switching round robin scheme or more complex scheduling.
    Type: Application
    Filed: December 31, 1997
    Publication date: June 14, 2001
    Applicant: PHILIPS ELECTRONICS NORTH AMERICA CORP.
    Inventor: JEFF E. ROMINE
  • Patent number: 6239472
    Abstract: A MOSFET structure having substantially reduced parasitic junction capacitance, relaxed thermal budget constraints and resiliency to hot carrier damage is disclosed. The MOSFET structure includes a gate stack that is disposed over a gate oxide that is in turn disposed over an active region of a substrate. A pair of shallow trenches are defined on either side of the gate stack, and an intrinsic silicon material is disposed within the pair of shallow trenches up to a top surface of the gate stack. The MOSFET structure further includes source and drain implanted impurities that are defined in an upper portion of the intrinsic silicon material. The upper portion is configured to extend down into the intrinsic silicon material to a target diffusion level that is just below the gate oxide of the gate stack.
    Type: Grant
    Filed: September 1, 1998
    Date of Patent: May 29, 2001
    Assignee: Philips Electronics North America Corp.
    Inventor: Jayarama N. Shenoy
  • Patent number: 6236222
    Abstract: Disclosed is a method for inspecting electrical interconnections in a multi-level semiconductor device. The method includes forming an interconnect structure in the multi-level semiconductor device. The interconnect structure has a lower metallization layer that lies in a lower level and an upper metallization layer that lies in an upper level. The method includes performing a passive voltage contrast operation using a scanning electron microscope to produce an image of the upper metallization layer of the interconnect structure. The method further includes inspecting the image produced by the scanning electron microscope to determine whether a misalignment is present in the interconnect structure. Additionally, the scanning electron microscope applies a beam of electrons over a selected portion of the interconnect structure, and secondary electrons are emitted off of the upper metallization layer in response to the beam of electrons.
    Type: Grant
    Filed: November 19, 1997
    Date of Patent: May 22, 2001
    Assignee: Philips Electronics North America Corp.
    Inventors: Harlan Sur, Jr., Ian R. Harvey
  • Patent number: 6235609
    Abstract: For use with a sub-micron semiconductor process, a trench isolation process enables the formation of a wider isolation oxide around the shallow trench isolation (STI) opening. The wider oxide width minimizes the recessing of oxide along the trench sidewalls during subsequent cleaning and etching steps. In a method for forming STI regions on a silicon substrate having a buffer oxide thereon and a nitride layer on top of the buffer oxide, a mask layer is defined on the nitride layer patterning isolation regions in unmasked areas of the nitride layer. Isolation regions of sufficient depth are etched through in unmasked areas of the nitride layer, the buffer oxide and into the silicon substrate. Performing a lateral etch (a nitride shaving) of the nitride layer under the mask layer undercuts a portion of the nitride layer under the mask layer. After the lateral etch, the mask layer is removed.
    Type: Grant
    Filed: April 3, 2000
    Date of Patent: May 22, 2001
    Assignee: Philips Electronics North America Corp.
    Inventors: Samit Sengupta, Faran Nouri
  • Patent number: 6236627
    Abstract: An optical recording medium having a number of adjacent tracks for storing digital optical information is provided, such as an optical disc. The tracks extend in a tangential direction, for example, surrounding the center of the disc. Each track is separated by a pitch amount in a radial direction, for example, outward from the center across the tracks. The tracks each have a servo field comprising one tracking mark located on the track in one of four discrete tangential positions A, B, C and D on the track. There is a mark in one of these four positions for every four adjacent tracks on the media. The position of the tracking marks repeat in the same sequence for every four adjacent tracks. For any four such adjacent tracks, the tracks having marks at positions A and B are separated by one track, and tracks having marks at positions C and D are separated by one track.
    Type: Grant
    Filed: December 17, 1998
    Date of Patent: May 22, 2001
    Assignee: Philips Electronics North America Corp.
    Inventor: Johannes J. Verboom
  • Patent number: 6226830
    Abstract: A vacuum cleaner is provided that is adapted to detect and display and/or avoid obstacles. In such vacuum cleaners the driving wheels and/or castor wheels that determine the direction of travel may be actively controlled to achieve, at the point in time of obstacle touch or obstacle sensing, a resultant velocity away from obstacles in the path of the cleaning apparatus.
    Type: Grant
    Filed: August 20, 1997
    Date of Patent: May 8, 2001
    Assignee: Philips Electronics North America Corp.
    Inventors: Antonius Hendriks, Damian M. Lyons, Frank Guida
  • Patent number: 6229685
    Abstract: A capacitor and a method of making the capacitor is provided. The capacitor includes a metallization line with a high dielectric constant layer defined over the metallization line. A thin metallization film is defined over the high dielectric constant layer, such that the thin metallization film defines a top plate of the capacitor, the high dielectric constant layer defines a dielectric for the capacitor, and the metallization line defines a bottom plate for the capacitor. The metallization line is defined from a metallization level and the thin metallization film is defined before a next metallization level above the metallization level is defined.
    Type: Grant
    Filed: December 20, 1999
    Date of Patent: May 8, 2001
    Assignee: Philips Electronics North America Corp.
    Inventors: Subhas Bothra, Dipankar Pramanik, Calvin T. Gabriel
  • Patent number: 6228683
    Abstract: A high density leaded ball-grid array package for packaging an integrated-circuit die includes a laminated substrate formed of a non-conductive layer sandwiched between first and second conductive trace patterns. A leadframe is directly attached onto the first conductive trace pattern of the laminated substrate by a non-conductive adhesive so that the open portion thereof overlies a central region of the laminated substrate. An integrated-circuit die is mounted in the central region of the laminated substrate. Bonding wires are interconnected between bonding pads formed on the integrated-circuit die and bonding fingers formed on the leadframe. A plastic material is molded over the top surface of the die, bonding fingers and bonding wires. A solder mask is applied on the second conductive trace pattern so as to form selective solderable areas. Finally, solder balls are attached to the selective solderable areas.
    Type: Grant
    Filed: September 22, 1998
    Date of Patent: May 8, 2001
    Assignee: Philips Electronics North America Corp
    Inventor: Kamran Manteghi
  • Patent number: 6225029
    Abstract: An electronic array of data elements, in particular, a flat display device preferably of the PALC type in which the plasma channels are defined by walls of an organic material, preferably a polyimide material. A protective layer is provided over the polyimide walls to prevent deterioration. Spaced electrode portions are preferably provided on facing surfaces of the walls. The preferred method is to lay down a thick layer of polyimide material and a thin resist over the polyimide layer, pattern the resist, and then use the resist to pattern the polyimide layer in the shape of the desired walls. The walls are then covered with a thin dielectric sheet-like member to form the plasma channels.
    Type: Grant
    Filed: April 16, 1998
    Date of Patent: May 1, 2001
    Assignee: Philips Electronics North America Corp.
    Inventors: Petrus Franciscus Gerardus Bongaerts, Henri R. J. R. Van Helleputte, Adrianus Leonardus Josephus Burgmans, Jacob Bruinink, Babar Ali Khan, Karel Elbert Kuijk
  • Patent number: 6226636
    Abstract: The system builds a database which stores data corresponding to a plurality of images. To begin, the system divides each image into N (N≧1) regions. Then, for each of the N regions, the system calculates a histogram of the region, generates a binary representation of the histogram, and stores data corresponding to the image in a binary tree based on the binary representation. The database may then be used to determine images which are similar to a query image. To do this, the system divides the query image into N regions, each of which corresponds to one of the binary trees in the database. Data corresponding to one or more images in the database is then retrieved from the binary trees based on the N regions. The system then determines which of these images is similar to the query image based on the retrieved data.
    Type: Grant
    Filed: November 20, 1998
    Date of Patent: May 1, 2001
    Assignee: Philips Electronics North America Corp.
    Inventors: Mohamed Abdel-Mottaleb, Santhana Krishnamachari
  • Patent number: 6226782
    Abstract: Disclosed is an apparatus for generating mask data suitable to produce a support pillar mask used in air dielectric interconnect structures. The apparatus includes a mask data scanner configured to select features having an interconnect dimension from a first mask. The features having the interconnect dimension being defined to electrically interconnect devices distributed on a substrate. The apparatus further includes a mask data comparing engine for comparing mask data associated with an intermediate support pattern and mask data associated with the features having the interconnect dimension selected by the mask data scanner. The comparing being configured to identify a mask area where the intermediate support pattern and the features having the interconnect dimension overlap. Preferably, the identified mask area defines the location of a plurality of pillars.
    Type: Grant
    Filed: May 4, 1999
    Date of Patent: May 1, 2001
    Assignee: Philips Electronics North America Corp.
    Inventors: Edward D. Nowak, Subhas Bothra
  • Patent number: 6222312
    Abstract: A fluorescent lamp includes a discharge tube with an ionizable filling which emits ultraviolet light when a discharge occurs, and an inside surface coated with a mixture of three phosphors which emit light in blue-green, green, and red wavelength ranges when exposed to the ultraviolet light. The green and red phosphors are conventional, for example LAP and YOX, while the blue-green phosphor is barium magnesium aluminate activated by europium and manganese (BBG). The BBG has spectra which are similar to those of conventional blue phosphors such as BAM or SCAP, but also emits in the green range from 500-540 nm and augments the LAP which is relatively low in this range.
    Type: Grant
    Filed: March 17, 2000
    Date of Patent: April 24, 2001
    Assignee: Philips Electronics North America Corp.
    Inventors: Snehasish Ghosh, Charles Trushell, Manuel Oomen
  • Patent number: 6221759
    Abstract: Disclosed is a method for forming an aligned via under a trench to prevent voiding in a dual damascene process. The trench is formed in an oxide layer that is formed over a first metal layer and the first metal layer is formed over a semiconductor substrate. The method includes forming an etch stop layer over the oxide layer and forming a set of adjacent trenches in the oxide layer through a portion of the etch stop layer. The method also includes forming a resist layer at least partially over the etch stop layer. The resist layer is formed in a via pattern to expose the set of adjacent trenches through the via pattern. The method further includes etching the oxide layer under the set of adjacent trenches until the oxide layer is etched through to expose at least a portion of the first metal layer so as to form a via under each of the adjacent trenches.
    Type: Grant
    Filed: June 19, 1998
    Date of Patent: April 24, 2001
    Assignee: Philips Electronics North America Corp.
    Inventors: Subhas Bothra, Stephen L. Skala
  • Patent number: 6218869
    Abstract: A pulse edge detector for detecting edges of a pulse signal in a bit stream. The bit stream, and herewith the pulse signal, is synchronized to a clock having half the resolution of a clock signal used to transmit the bit stream. Falling and rising edges of the synchronized pulse signal are determined. It is further determined whether the falling and rising edges of the pulse signal fall within a first or a second phase of the clock signal. The determined phase result is recorded for further processing by a succeeding circuit such as a counter. By determination of the pulse phase in both phases of the clock pulse, a double resolution pulse edge detector is obtained.
    Type: Grant
    Filed: November 25, 1998
    Date of Patent: April 17, 2001
    Assignee: Philips Electronics North America Corp.
    Inventors: Jerry Hongbin Hao, William W. Kolb
  • Patent number: 6211618
    Abstract: Fluorescent tube type discharge lamp has end sealed in base with terminal pins connected to lead wires passing through stem press and supporting an electrode in the form of a coil having an emitter. Bimetal strip has a first end welded to one of the leads and a second end proximate to a thin walled portion of the stem. When electrode fails and an arc discharge operates directly off the leads, the bimetal strip heats up so that second end contacts thin walled portion and arcs through to admit air for passive failure of lamp.
    Type: Grant
    Filed: April 27, 1999
    Date of Patent: April 3, 2001
    Assignee: Philips Electronics North America Corp.
    Inventors: Stephen C. Fancher, Thomas O. Leyh
  • Patent number: 6208691
    Abstract: A method of achieving seamless switching of digitally compressed signals. The method includes the steps of identifying the point in a video signal where splicing to a second video signal is desired, and thereafter, maintaining adherence to certain parameters in the encoder buffer to ensure that the input signal. is not being compressed at a rate that causes either underflow or overflow in the encoder buffer. The method also includes the steps of constraining the upper bound of the encoder buffer to ensure that data is not being outputted from the encoder buffer to the decoder buffer too slowly so as to cause an underflow of data in the decoder buffer. The method may also include the steps of constraining the lower bound of the encoder buffer to ensure that data is not being outputted from the encoder buffer to the decoder buffer too quickly so as to cause an overflow of data in the decoder buffer.
    Type: Grant
    Filed: August 6, 1999
    Date of Patent: March 27, 2001
    Assignee: Philips Electronics North America Corp.
    Inventors: Mahesh Balakrishnan, Cedric Caron