Abstract: The time a microprocessor CPU must wait for memory access is controlled to be one of two values by stretching the CPU clock signal either a first time duration or a second time duration, depending on the expected delay caused by the memory access. The clock stretching is in increments of one quarter of the CPU clock period and is done with both the leading and trailing edges of the clock pulse.

Abstract: The temperature of a circuit is monitored and controlled by accumulating an estimate of heat generated in the circuit, and decreasing heat generation in the circuit when necessary. A periodic sampling of the operating mode of the circuit, as determined by clock speed and bus cycle activity, is used to determine heat accumulation in the circuit. An up/down counter increments when the sampling shows an operating mode indicating heating of the circuit and decrements when the sampled mode indicates cooling of the circuit. The circuit is forced to cool if a count on the up/down counter reaches a programmable threshold. Cooling is accomplished by slowing the clock speed of the circuit.

Abstract: Power dissipation of a CMOS circuit such as a microprocessor is reduced by dynamically slowing down the microprocessor clock during selected system operations such as hold, wait, or AT peripheral bus access cycles. The microprocessor clock is slowed to its minimum allowable frequency with precise synchronous control to maintain the accuracy of high frequency clock edges and to prevent glitches or substandard pulse widths.