Abstract: The present invention discloses an electronic camera which processes the exposure of light by means of an imaging surface comprising a plurality of active pixel sensor circuits. Each pixel sensor circuit produces a small current inversely proportional to the amount of light that has fallen on a photodiode within the pixel sensor circuit. The individual currents produced by the active pixel sensor circuits are aggregated onto one or more current collection busses and operatively channeled to an operational amplifier assigned to a given bus. If a single operational amplifier is used, its output voltage is compared to a preset voltage level. When the voltage level decays to a preset level, a control signal is signaled.

Abstract: A solid state color imager with preferential response to two or more colors of light includes a first color-selective photoreceptor built in part from a first color-selective semiconductor region limited in depth according to a first color fractional absorption ratio for a first color of light, as well as a second color-selective photoreceptor built in part from a second color-selective semiconductor region limited in depth according to a second color fractional absorption ratio for a second color of light. The imager may provide a light shield above the second color-selective semiconductor region and position the second color-selective photoreceptor in proximity to the first color-selective photoreceptor. The second color-selective photoreceptor may then collect electrons diffusing from the first color-selective photoreceptor and generated by the second color of light.

Abstract: An image sensor having a photo-detector and a reset contact that are electrically connected by a discharge path disposed between the reset contact and the photo-detector. The photo-detector has a depletion region for receiving and collecting radiation charges that are discharged through the discharge path to the reset contact. In one implementation, the reset of the photo-detector to a known potential is achieved by applying a high reset voltage to the reset contact that causes a reset depletion region to form beneath the reset contact. The outer perimeter of the reset depletion region defines a reset junction. The reset junction and the photo-detector junction are of the same polarity. As the high reset voltage is increased at the reset junction, the reset depletion region merges via punch through with the photo-detector's depletion region to create the discharge path.

Abstract: A programmable image transform processor has a programmable addressing and arithmetic blocks. In the programmable addressing block, an input address generator has an input addressing microsequencer and an input addressing memory that stores an input addressing procedure. The microsequencer executes the input addressing procedure to generate addresses from which to request image data. In the programmable arithmetic block, an arithmetic block memory stores an image processing procedure and a microsequencer executes the image processing procedure using the image data to generate transformed image data.

Abstract: The invention is directed to an image sensor with enhanced blue response and limited cross-talk. The image sensor is made of a photodiode layer. Disposed on one side of the photodiode layer is a substrate layer made out of an oppositely charged semiconductor material. The substrate layer is further defined by two different sub-layers, where the doping densities of the sub-layers differ. This difference in doping creates a deep electric field that inhibits carriers from moving to another sensor. Additionally, the potential of the deep electric field directs these carriers back to the N-P junction formed by the substrate layer and the photodiode layer. Working in conjunction with this, a shallow implant layer is disposed on the opposite side of the photodiode layer. The shallow implant layer creates an electric field between the photodiode layer and the shallow implant layer, directing carriers to the photodiode layer.

Abstract: An active pixel sensor circuit including a photodetector, a first MOS transistor functioning as the driver of a source follower amplifier during signal readout, a second MOS transistor serving as a pixel readout transistor, a third MOS transistor serving as a photodetector reset transistor, and a reset noise cancellation circuit including a fourth MOS transistor, first and second capacitances, and an amplifier having a gain which is a specified multiple of the ratio of the first to the second capacitance. The first capacitance is connected in parallel to the photodector. The amplifier reduces the reset noise caused by resetting the photodector without having to implement correlated double sampling.

Abstract: A programmable timing generator for a digital imaging system has a first clock generator and a second clock generator. The first clock generator includes a programmable microsequencer and generates a plurality of first clock signals in response to the microsequencer. The second programmable clock generator is responsive to the microsequencer and generates second clock signals. The first clock signals have a lower frequency than the second clock signals. In a typical implementation, the second clock signals are called horizontal clock signals, which are used for clocking rows of pixel data out of a digital image sensor, while the first clock signals are called vertical clock signals that are used for shifting pixel data one position in vertical shift registers in the digital image sensor. The horizontal or vertical clock signals can also be used to control the image capture operation of the digital sensor, with the programmable microsequencer being used to control the image capture exposure time.

Abstract: A comparator network includes a comparator and a switched capacitor front end coupled to the comparator. The switched capacitor front end includes an input signal sampling capacitance, a reference signal sampling capacitance, and a switch network for coupling the input signal sampling capacitance and the reference signal sampling capacitance between a sampling configuration and a charge sharing configuration. The input signal sampling capacitance is realized with first and second differential input sampling capacitors, and the reference signal sampling capacitance is realized with first and second differential reference signal capacitors. Clocks change the switched capacitor front end between the sampling configuration and the charge sharing configuration. The comparator network is set at a preselected voltage threshold by setting a ratio of the reference sampling capacitance to the input sampling capacitance equal to a ratio of the preselected threshold voltage to a reference voltage.

Abstract: A semiconductor component that receives incoming light includes an integrated circuit, a package and an optics unit. The optics unit may provide a pathway, either generally or selectively, for the incoming light to the photodetector circuitry of the integrated circuit and may modify the incoming light, as well. The optics unit may be either electrically active or passive. When active, the optics unit is coupled to the integrated circuit with a conductor. The optics unit may also include a liquid crystal device, a beamsplitter assembly, a lensing assembly or other filters, and/or apertures. The liquid crystal device can act as a shutter or a display and the optics unit may be a single module or a plurality of modules. The integrated circuit may also include shutter drive circuitry and image processing circuitry.

Abstract: An imager pixel including a photodetector, a first MOS transistor functioning as the driver of a source follower amplifier, a second MOS transistor functioning as a pixel readout transistor, and a third transistor performing a dual function to reset the photodetector during a first time interval and cancel reset noise by serving as a weak current source during a second time interval.

Abstract: An imager pixel including a photodetector, a first MOS transistor functioning as the driver of a source follower amplifier during signal readout, a second MOS transistor serving as a pixel readout transistor, a third MOS transistor serving as a photodetector reset transistor, and a reset noise cancellation circuit including a fourth MOS transistor, first and second capacitances, and an amplifier having a gain which is the inverse of the ratio of the first to the second capacitance.

Abstract: An image processing device is provided for still and video imaging systems which use a low number of samples per image pixel, preferably a single color component per each image pixel. The device includes an edge-dependent and edge-side-dependent color interpolation process, preferably implemented within the imaging system or within a host image processing computer hardware. The process reconstructs the missing color components of each said image pixel with high accuracy, because it is based on the detection of the spatial features present in the pixel neighborhood, thus providing sharp images without artifacts and with smooth transition in hue from pixel to pixel.

Abstract: An apparatus and method for achieving uniform low dark currents with CMOS photodiodes. A threshold voltage of a reset FET is set to an appropriate value such that the dark current from a photodiode is actively removed through the reset FET during signal integration. This reduces the dark current by over 3 orders of magnitude as compared to conventional active pixel sensors, without requiring pinned photodiodes.

Abstract: An imaging array of active pixel sensors uses a reset amplifier in each pixel in a four transistor CMOS implementation. The reset amplifier acts as a variable resistance in the source-follower amplifier feedback circuit. The variable resistance is controlled by a range reset voltage applied to the reset amplifier thereby nulling the photodiode reset noise. The ramp reset voltage is applied to all reset amplifiers of all pixels at the same time, thereby providing for reset of the entire array at the same time, i.e., global reset.

Abstract: The invention is an imaging device having a high fill factor. The high fill factor is achieved by constructing the light sensors in a vertical fashion in the imaging device. The control circuitry of the light sensor is then contained inside the integrated circuit chip, rather than taking up area that could otherwise be used for light collection. The majority of the area on the surface of the IC chip is made up of light sensing elements, since the control circuitry is embedded in the IC chip. The control circuitry is connected to the light sensing devices through vias in the IC chip. The control circuitry of the chip is mainly contained within the die, rather than on it.