Abstract: A method of controlling first and second processing elements which have associated respective first and second address memories, and associated respective first and second data memories, the method comprising storing first and second pluralities of address entries in the first and second address memories respectively, exchanging a pre-determined number of address entries between the first and second address memories, retrieving data entries from a common data store on the basis of the address entries held in the first address memory, storing the retrieved data entries in the first data memory, and exchanging the pre-determined number of data entries between the first and second data memories, such that the first data memory includes data entries corresponding to the address entries stored in the first address memory, and such that the second data memory includes data entries corresponding to the address entries stored in the second address memory.

Abstract: Methods, apparatus and program products provide load balancing in a paralell processing image generation system. In an image generation system for generating pixel values of a pixel array which corresponds to a group of geometric primitives which define a computer generated image where the image generation system includes a plurality of processing elements which are assigned to a specified pixel of the pixel array. The specification of pixels to processing elements is carried out to balance the processing load of the plurality of processing elements. Regions of the pixel array may be associated with subsets of the plurality of processing elements. A linear expression evaluator then provides region specific coefficients to the subsets of the plurality of processing elements. The plurality of processing elements may also be divided into a plurality of panels.