Patents Assigned to PowerSmart, Inc.
  • Patent number: 6407402
    Abstract: An opto-isolator circuit for providing isolation between a bi-directional, I2C transmission line and a pair of single-direction transmission lines. The opto-isolator circuit includes a bi-directional port for receiving data from, and providing data to, the bi-directional transmission line. The circuit further includes an output path that has (i) a first buffer for receiving outgoing data from the bi-directional port, (ii) a first opto-isolator for receiving the outgoing data from an output of the first buffer, and (iii) a second buffer for receiving the outgoing data from an output of the first opto-isolator and providing the outgoing data to an output port. The circuit also includes an input path, that has (i) a third buffer for receiving incoming data from an input port, (ii) a second opto-isolator for receiving the incoming data from an output of the third buffer, and (iii) a fourth buffer for receiving the incoming data from an output of the second opto-isolator.
    Type: Grant
    Filed: October 27, 2000
    Date of Patent: June 18, 2002
    Assignee: PowerSmart, Inc.
    Inventor: Parviz Ghaseminejad
  • Patent number: 6304062
    Abstract: A device for monitoring current flowing through an electrical circuit includes a current shunt plate connected between at least one terminal of the electrical circuit and an electrical load; a circuit board mounted to the current shunt plate at at least two connection points; and a current measuring device mounted on the circuit board, the current measuring device being adapted for measuring a voltage drop between the at least two connection points and determining the current flowing the current flowing through the electrical circuit.
    Type: Grant
    Filed: October 13, 2000
    Date of Patent: October 16, 2001
    Assignee: PowerSmart, Inc.
    Inventor: David C. Batson
  • Patent number: 5926419
    Abstract: A method for fabricating an application specific integrated circuit (ASIC) from a multitude of silicon layers, including upper silicon layers and lower silicon layers. A processor for performing defined calculations and a random access memory (RAM) for storing a plurality of variable data values are formed in the lower layers of the application specific integrated circuit. A read only memory (ROM) is formed in the uppermost layer of the application specific integrated circuit using a metal mask. The plurality of control functions and constant data values stored in the read only memory are required for operation of a particular type of battery with a particular type of battery chemistry, such as a rechargeable nickel metal hydride battery, or a rechargeable lithium ion battery. The invention allows one core ASIC to be programmed into several separate final products, each with a different last mask ROM code layer.
    Type: Grant
    Filed: July 15, 1997
    Date of Patent: July 20, 1999
    Assignee: Powersmart, Inc.
    Inventors: Duong Van Phuoc, Daniel D. Friel, Matthew P. Hull