Patents Assigned to QST Holdings, Inc.
  • Patent number: 7979646
    Abstract: A memory controller to provide memory access services in an adaptive computing engine is provided. The controller comprises: a network interface configured to receive a memory request from a programmable network; and a memory interface configured to access a memory to fulfill the memory request from the programmable network, wherein the memory interface receives and provides data for the memory request to the network interface, the network interface configured to send data to and receive data from the programmable network.
    Type: Grant
    Filed: October 15, 2008
    Date of Patent: July 12, 2011
    Assignee: QST Holdings, Inc.
    Inventors: Fredrick Curtis Furtek, Paul L. Master
  • Patent number: 7962716
    Abstract: The present invention concerns a new category of integrated circuitry and a new methodology for adaptive or reconfigurable computing. The preferred IC embodiment includes a plurality of heterogeneous computational elements coupled to an interconnection network. The plurality of heterogeneous computational elements include corresponding computational elements having fixed and differing architectures, such as fixed architectures for different functions such as memory, addition, multiplication, complex multiplication, subtraction, configuration, reconfiguration, control, input, output, and field programmability. In response to configuration information, the interconnection network is operative in real-time to configure and reconfigure the plurality of heterogeneous computational elements for a plurality of different functional modes, including linear algorithmic operations, non-linear algorithmic operations, finite state machine operations, memory operations, and bit-level manipulations.
    Type: Grant
    Filed: November 17, 2004
    Date of Patent: June 14, 2011
    Assignee: QST Holdings, Inc.
    Inventors: Paul L. Master, Eugene Hogenauer, Walter James Scheuermann
  • Patent number: 7961226
    Abstract: The present invention provides a digital imaging apparatus having an optical sensor, an analog-to-digital converter, a plurality of computational elements, and an interconnection network. The optical sensor converts an object image into a detected image, which is then converted to digital image information by the analog-to-digital converter. The plurality of computational elements includes a first computational element having a first fixed architecture and a second computational element having a second, different fixed architecture. The interconnection network is capable of providing a processed digital image from the digital image information by configuring and reconfiguring the plurality of computational elements for performance of a plurality of different imaging functions. The invention may be embodied, for example, as a digital camera, a scanner, a printer, or a dry copier.
    Type: Grant
    Filed: September 15, 2009
    Date of Patent: June 14, 2011
    Assignee: QST Holdings, Inc.
    Inventors: Paul L. Master, John Watson
  • Patent number: 7941614
    Abstract: A memory controller to provide memory access services in an adaptive computing engine is provided. The controller comprises: a network interface configured to receive a memory request from a programmable network; and a memory interface configured to access a memory to fulfill the memory request from the programmable network, wherein the memory interface receives and provides data for the memory request to the network interface, the network interface configured to send data to and receive data from the programmable network.
    Type: Grant
    Filed: May 7, 2009
    Date of Patent: May 10, 2011
    Assignee: QST, Holdings, Inc
    Inventors: Frederick Curtis Furtek, Paul L. Master
  • Patent number: 7865847
    Abstract: A system and corresponding method for creating an adaptive computing engine (ACE) includes algorithmic elements, ACE building blocks, and creates a design for heterogeneous nodes to provide appropriate hardware circuit functions that implement the algorithmic elements. Creating the design includes selecting an initial set of the ACE building blocks. The system and corresponding method also optimizes the design by selecting a different set of the ACE building blocks that meets predetermined performance standards for the efficiency of the ACE when performance of the ACE is simulated. The ACE building block preferably belong to one of a plurality of building block types. Preferably, the system and method includes a profiler for providing code to simulate a hardware design that implements the algorithmic elements, for identifying hotspots in the code, and for creating the design based thereon.
    Type: Grant
    Filed: January 25, 2008
    Date of Patent: January 4, 2011
    Assignee: QST Holdings, Inc.
    Inventor: Paul L. Master
  • Publication number: 20100191961
    Abstract: Aspects for achieving individualized protected space in an operating system are provided. The aspects include performing on demand hardware instantiation via an ACE (an adaptive computing engine), and utilizing the hardware for monitoring predetermined software programming to protect an operating system.
    Type: Application
    Filed: December 29, 2009
    Publication date: July 29, 2010
    Applicant: QST Holdings, Inc.
    Inventor: Paul L. Master
  • Publication number: 20100161775
    Abstract: The present invention provides a method and apparatus for configuration of adaptive integrated circuitry, to provide one or more operating modes or other functionality in a communication device, such as a cellular telephone, a GSM telephone, another type of mobile telephone or mobile station, or any other type of media communication device, including video, voice or radio, or other forms of multimedia. The adaptive integrated circuitry is configured and reconfigured for multiple tasks, such as channel acquisition, voice transmission, or multimedia and other data processing. In the preferred embodiment, the configuration and reconfiguration occurs to adaptively optimize the performance of the particular activity over time, such as to increase the speed of channel acquisition, increase throughput rates, increase perceived voice and media quality, and decrease the rate of dropped communication sessions.
    Type: Application
    Filed: March 8, 2010
    Publication date: June 24, 2010
    Applicant: QST Holdings, Inc.
    Inventors: Paul L. Master, Bohumir Uvacek
  • Publication number: 20100161940
    Abstract: The present invention concerns a new category of integrated circuitry and a new methodology for adaptive or reconfigurable computing. The preferred IC embodiment includes a plurality of heterogeneous computational elements coupled to an interconnection network. The plurality of heterogeneous computational elements include corresponding computational elements having fixed and differing architectures, such as fixed architectures for different functions such as memory, addition, multiplication, complex multiplication, subtraction, configuration, reconfiguration, control, input, output, and field programmability. In response to configuration information, the interconnection network is operative in real-time to configure and reconfigure the plurality of heterogeneous computational elements for a plurality of different functional modes, including linear algorithmic operations, non-linear algorithmic operations, finite state machine operations, memory operations, and bit-level manipulations.
    Type: Application
    Filed: March 8, 2010
    Publication date: June 24, 2010
    Applicant: QST Holdings, Inc.
    Inventors: Paul L. Master, Eugene Hogenauer, Walter James Scheuermann
  • Publication number: 20100159910
    Abstract: The present invention provides a method and apparatus for configuration of adaptive integrated circuitry, to provide one or more operating modes or other functionality in a communication device, such as a cellular telephone, a GSM telephone, another type of mobile telephone or mobile station, or any other type of media communication device, including video, voice or radio, or other forms of multimedia. The adaptive integrated circuitry is configured and reconfigured for multiple tasks, such as channel acquisition, voice transmission, or multimedia and other data processing. In the preferred embodiment, the configuration and reconfiguration occurs to adaptively optimize the performance of the particular activity over time, such as to increase the speed of channel acquisition, increase throughput rates, increase perceived voice and media quality, and decrease the rate of dropped communication sessions.
    Type: Application
    Filed: March 8, 2010
    Publication date: June 24, 2010
    Applicant: QST Holdings, Inc.
    Inventors: Paul L. Master, Bohumir Uvacek
  • Publication number: 20100002100
    Abstract: The present invention provides a digital imaging apparatus having an optical sensor, an analog-to-digital converter, a plurality of computational elements, and an interconnection network. The optical sensor converts an object image into a detected image, which is then converted to digital image information by the analog-to-digital converter. The plurality of computational elements includes a first computational element having a first fixed architecture and a second computational element having a second, different fixed architecture. The interconnection network is capable of providing a processed digital image from the digital image information by configuring and reconfiguring the plurality of computational elements for performance of a plurality of different imaging functions. The invention may be embodied, for example, as a digital camera, a scanner, a printer, or a dry copier.
    Type: Application
    Filed: September 15, 2009
    Publication date: January 7, 2010
    Applicant: QST Holdings, Inc.
    Inventors: Paul L. Master, John Watson
  • Publication number: 20090325555
    Abstract: A system for efficient sale of devices that comply with licensed standards. A preferred embodiment of the invention uses a generic, or highly adaptable, hardware device. The device can be adapted to adhere to a specific standard, e.g., code-division multiple access, time-division multiple access, etc., after manufacture such as at the point-of-sale to an end user, prior to distribution, or at some other point in a distribution and sales network. This allows manufacturers, retailers and end users to benefit from more competitive selection of standardized communication, data and other formats. Reduction of manufacturing costs and elimination of shipping, or other transfer and storage costs, is also realized.
    Type: Application
    Filed: September 4, 2009
    Publication date: December 31, 2009
    Applicant: QST Holdings, Inc.
    Inventors: Paul L. Master, John Watson
  • Patent number: 7609297
    Abstract: The present invention provides a digital imaging apparatus having an optical sensor, an analog-to-digital converter, a plurality of computational elements, and an interconnection network. The optical sensor converts an object image into a detected image, which is then converted to digital image information by the analog-to-digital converter. The plurality of computational elements includes a first computational element having a first fixed architecture and a second computational element having a second, different fixed architecture. The interconnection network is capable of providing a processed digital image from the digital image information by configuring and reconfiguring the plurality of computational elements for performance of a plurality of different imaging functions. The invention may be embodied, for example, as a digital camera, a scanner, a printer, or a dry copier.
    Type: Grant
    Filed: June 25, 2003
    Date of Patent: October 27, 2009
    Assignee: QST Holdings, Inc.
    Inventors: Paul L. Master, John Watson
  • Patent number: 7602740
    Abstract: A system for efficient sale of devices that comply with licensed standards. A preferred embodiment of the invention uses a generic, or highly adaptable, hardware device. The device can be adapted to adhere to a specific standard, e.g., code-division multiple access, time-division multiple access, etc., after manufacture such as at the point-of-sale to an end user, prior to distribution, or at some other point in a distribution and sales network. This allows manufacturers, retailers and end users to benefit from more competitive selection of standardized communication, data and other formats. Reduction of manufacturing costs and elimination of shipping, or other transfer and storage costs, is also realized.
    Type: Grant
    Filed: December 10, 2001
    Date of Patent: October 13, 2009
    Assignee: QST Holdings, Inc.
    Inventors: Paul L. Master, John Watson
  • Publication number: 20080098203
    Abstract: The present invention concerns configuration of a new category of integrated circuitry for adaptive computing. The various embodiments provide an executable information module for an adaptive computing engine (ACE) integrated circuit and may include configuration information, operand data, and may also include routing and power control information. The ACE IC comprises a plurality of heterogeneous computational elements coupled to an interconnection network. The plurality of heterogeneous computational elements include corresponding computational elements having fixed and differing architectures, such as fixed architectures for different functions such as memory, addition, multiplication, complex multiplication, subtraction, configuration, reconfiguration, control, input, output, and field programmability. In response to configuration information, the interconnection network is operative to configure the plurality of heterogeneous computational elements for a plurality of different functional modes.
    Type: Application
    Filed: December 21, 2007
    Publication date: April 24, 2008
    Applicant: QST HOLDINGS, INC.
    Inventors: Paul MASTER, Stephen SMITH, John WATSON