Patents Assigned to Quick Technologies Ltd.
  • Patent number: 5861641
    Abstract: A customizable logic array device including an array of identical multiple input, function selectable logic cells comprising a first conductive layer, application configurable interconnection apparatus selectably interconnecting the multiple input, function selectable logic cells, the application configurable interconnection apparatus comprising at least two conductive layers.
    Type: Grant
    Filed: August 15, 1994
    Date of Patent: January 19, 1999
    Assignee: Quick Technologies Ltd.
    Inventors: Uzi Yoeli, Eran Rotem, Meir Janai, Zvi Orbach
  • Patent number: 5545904
    Abstract: Customizable semiconductor/devices, integrated circuit gate arrays and techniques to produce same are disclosed. The devices comprise integrated circuit blanks having a collection of semiconductor elements and at least one metal layer including fusible links interconnecting said collection of semiconductor elements into an inoperably connected integrated circuit blank. At least one metal layer is first etched thereby to define a pattern of conductors. A passivation layer is provided over at least one metal layer, afterwhich at least one metal layer is etched a second time for selectably removing the fusible links, thereby converting the inoperable integrated circuit blank into a selected operable electronic function.
    Type: Grant
    Filed: June 23, 1993
    Date of Patent: August 13, 1996
    Assignee: Quick Technologies Ltd.
    Inventor: Zvi Orbach
  • Patent number: 5541814
    Abstract: A personalizable multi-chip carrier including a substrate, first and second pluralities of conductors arranged on respective first and second parallel planes, the first and second pluralities of conductors defining a grid of conductors arranged over the substrate and defining a multiplicity of crossing locations at which conductors of the first and second pluralities cross each other, apparatus for interconnecting the first and second pluralities of conductors at locations adjacent the multiplicity of crossing locations and including a plurality of fusible links.
    Type: Grant
    Filed: October 8, 1993
    Date of Patent: July 30, 1996
    Assignee: Quick Technologies Ltd.
    Inventors: Meir I. Janai, Zvi Orbach
  • Patent number: 5367392
    Abstract: An active matrix of a display panel having a plurality of array elements and at least two data busses, each array element including a primary switch initially connected to the data busses and at least one connectable secondary switch, wherein, when the primary switch is disconnected from the busses, one of the at least one secondary switches is connected to the busses.
    Type: Grant
    Filed: March 16, 1993
    Date of Patent: November 22, 1994
    Assignee: Quick Technologies Ltd.
    Inventor: Meir I. Janai
  • Patent number: 5329152
    Abstract: A programmable integrated circuit for prototyping applications including a first patterned metal layer, an insulation layer formed over the first metal layer and a second patterned metal layer formed over the insulation layer, the first and second patterned metal layers being formed with selectably removable regions, the insulation layer being formed with apertures overlying at least some of the selectably removable regions, and there being formed over the selectably removable regions a coating comprising a layer of a dielectric material of high laser radiation absorption coefficient.
    Type: Grant
    Filed: January 24, 1992
    Date of Patent: July 12, 1994
    Assignee: Quick Technologies Ltd.
    Inventors: Meir I. Janai, Zvi Orbach, Alon Kapel, Sharon Zehavi
  • Patent number: 5260597
    Abstract: A selectably customizable semiconductor device including a first metal layer disposed in a first plane and including first elongate strips extending parallel to a first axis, a second metal layer disposed in a second plane generally parallel to and electrically insulated from said first plane and including second elongate strips extending parallel to a second axis, the second axis being generally perpendicular to the first axis, whereby a multiplicity of elongate strip overlap locations are defined at which the elongate strips of the first and second metal layers overlap in electrical insulating relationship;the second metal layer comprising a plurality of fusible conductive bridges joining adjacent pairs of the second elongate strips, each of the fusible conductive bridges including first and second fusible links;a via being defined between the first and second metal layers at a location along each of the fusible conductive strips intermediate the first and second fusible links;the fusible conductive bridges
    Type: Grant
    Filed: January 7, 1991
    Date of Patent: November 9, 1993
    Assignee: Quick Technologies Ltd.
    Inventors: Zvi Orbach, Uzi Yoeli
  • Patent number: 5138194
    Abstract: A controlled slew rate buffer is disclosed which comprises a driver receiving voltage along a voltage supply line and includes feedback apparatus which senses the noise level along the voltage supply line and slows the speed of the buffer when the noise level passes a given threshold. The driver comprises at least one of (1) first and second VSS voltage sources and (2) first and second VDD voltage sources.
    Type: Grant
    Filed: November 8, 1990
    Date of Patent: August 11, 1992
    Assignee: Quick Technologies Ltd.
    Inventor: Uzi Yoeli
  • Patent number: 5111273
    Abstract: An integrated circuit which is readily customized by the user to his specific requirements and is thus suitable for prototype and small scale production.
    Type: Grant
    Filed: June 19, 1990
    Date of Patent: May 5, 1992
    Assignee: Quick Technologies Ltd.
    Inventors: Zvi Orbach, Meir I. Janai
  • Patent number: 5027027
    Abstract: A method of moving along a travel axis and in a selected direction a driven member comprising the steps of providing translation apparatus including a driver mounted in a fixed position relative to a base, the driver comprising selectably operable forward, center and rear elements coupled in series and associated with the driven member and being arranged parallel to the travel axis, the forward and rear elements comprising apparatus for clamping the driven member and the center element comprising apparatus for varying the distance between the forward and rear elements; and in a series of distinct steps, operating the forward, center and rear elements so as to cause movement of the driven member relative to the base including, steps of operation, partially overlapping in time, of the forward and center elements and the center and rear elements and steps of operation, non-overlapping in time, of the forward and rear elements.
    Type: Grant
    Filed: July 20, 1989
    Date of Patent: June 25, 1991
    Assignee: Quick Technologies Ltd.
    Inventors: Zvi Orbach, Zeev Ganor