Abstract: A system including an optimization module executing on and configured to enable a computer processor to: receive a user application including a set of functions and simulate execution of different configurations of the functions on a multi-core microprocessor chip, where: the multi-core microprocessor chip includes a set of tiles arranged in a grid configuration, where each tile includes a processor core and a corresponding router, where each router is communicatively coupled with at least one other router to form a network-on-chip and implements a deterministic static priority routing policy, and the different configurations include execution of the functions by different groups of tiles. The computer processor is further enabled to monitor network traffic patterns of the execution of the different configurations; rank the different configurations based on the corresponding network traffic patterns; and select an optimal configuration of the different configurations based on the ranking.

Abstract: A method and system for implementing very long instruction words (VLIW), the system operable to: receive a first very long instruction word (VLIW) including a set of slot instructions corresponding to a set of functional units, where: each slot instruction includes an opcode identifying an operation to be performed by the set of functional units and value fields related to the operation, where a dedicated subset of the value fields include dedicated bits dedicated to the slot instruction and an allocable subset of the value fields include allocable bits allocable to other slot instructions; identify the opcodes of each slot instruction; determine, based on the opcodes, which allocable bits are allocated to which slot instructions; and instruct each functional unit to perform an operation identified by a corresponding slot instruction using the corresponding dedicated bits and any allocable bits determined to be allocated to the slot instruction.