Abstract: In a general aspect, user requests for access distributed quantum computing resources in a distributed quantum computing system are managed. In a general aspect, a job request for accessing a quantum computing resource is received. The job request includes a user id and a program. On authentication of a user associated with the job request, a job identifier is assigned to the job request, and a particular quantum computing resource is selected for the job request. The job request is individualized based on user permissions and pushed onto a queue to be processed for execution by the quantum computing resource.

Abstract: In some aspects, a heterogeneous computing system includes a quantum processor unit and a classical processor unit. In some instances, variables defined by a computer program are stored in a classical memory in the heterogeneous computing system. The computer program is executed in the heterogeneous computing system by operation of the quantum processor unit and the classical processor unit. Instructions are generated for the quantum processor by a host processor unit based on values of the variables stored in the classical memory. The instructions are configured to cause the quantum processor unit to perform a data processing task defined by the computer program. The values of the variables are updated in the classical memory based on output values generated by the quantum processor unit. The classical processor unit processes the updated values of the variables.

Abstract: In a general aspect, a quantum process for execution by a quantum processor is generated. In some instances, test data representing a test output of a quantum process are obtained. The test data are obtained based on a value assigned to a variable parameter of the quantum process. An objective function is evaluated based on the test data, and an updated value is assigned to the variable parameter based on the evaluation of the objective function. The quantum process is provided for execution by a quantum processor, and the quantum process provided for execution has the updated value assigned to the variable parameter.

Abstract: In a general aspect, calibration is performed in a quantum computing system. In some cases, domains of a quantum computing system are identified, where the domains include respective domain control subsystems and respective subsets of quantum circuit devices in a quantum processor of the quantum computing system. Sets of measurements are obtained from one of the domains and stored in memory. Device characteristics of the quantum circuit devices of the domain are obtained based on the set of measurements, and the device characteristics are stored in a memory of the control system. Quantum logic control parameters for the subset of quantum circuit devices of the domain are obtained based on the set of measurements and stored in memory.

Abstract: In a general aspect, information is encoded in data qubits in a three-dimensional device lattice. The data qubits reside in multiple layers of the three-dimensional device lattice, and each layer includes a respective two-dimensional device lattice. A three-dimensional color code is applied in the three-dimensional device lattice to detect errors in the data qubits residing in the multiple layers. A two-dimensional color code is applied in the two-dimensional device lattice in each respective layer to detect errors in one or more of the data qubits residing in the respective layer.

Abstract: In a general aspect, quantum computing system performance is tested. Systems and methods for testing hardware in a quantum computing system are described. The methods may include certification/decertification of data produced by the quantum computing system, detection of faults, correction of errors and/or recalibration/replacement of the quantum computing system or a quantum computing subsystem.

Abstract: In a general aspect, a quantum error-correction technique includes applying a first set of two-qubit gates to qubits in a lattice cell, and applying a second, different set of two-qubit gates to the qubits in the lattice cell. The qubits in the lattice cell include data qubits and ancilla qubits, and the ancilla qubits reside between respective nearest-neighbor pairs of the data qubits. After the first and second sets of two-qubit gates have been applied, measurement outcomes of the ancilla qubits are obtained, and the parity of the measurement outcomes is determined.

Abstract: In a general aspect, values of input parameters for a quantum approximate optimization algorithm (QAOA) are selected by a Bayesian optimizer. The QAOA can be configured to solve a combinatorial optimization problem (COP), such as Maximum Cut. A hybrid classical-quantum computing system can be used to execute the QAOA and select the input parameters.

Abstract: A quantum computing system that includes a quantum circuit device having at least one operating frequency; a first substrate having a first surface on which the quantum circuit device is disposed; a second substrate having a first surface that defines a recess of the second substrate, the first and second substrates being arranged such that the recess of the second substrate forms an enclosure that houses the quantum circuit device; and an electrically conducting layer that covers at least a portion of the recess of the second substrate.

Abstract: In a general aspect, a qubit device includes two circuit loops. In some aspects, a first circuit loop includes a first Josephson junction, a second circuit loop includes a second Josephson junction, and the first and second loops are configured to receive a magnetic flux that defines a transition frequency of a qubit device. In some aspects, a quantum integrated circuit includes an inductor connected between a first circuit node and a second circuit node; the first Josephson junction connected in parallel with the inductor between the first circuit node and the second circuit node; and the second Josephson junction connected in parallel with the inductor between the first circuit node and the second circuit node.

Abstract: In some aspects, a quantum computing system includes a multi-dimensional array of qubit devices. Coupler devices reside at intervals between neighboring pairs of the qubit devices in the multi-dimensional array. Each coupler device is configured to produce an electromagnetic interaction between one of the neighboring pairs of qubit devices. In some cases, each qubit device has a respective qubit operating frequency that is independent of an offset electromagnetic field experienced by the qubit device, and the coupling strength of the electromagnetic interaction provided by each coupler device varies with an offset electromagnetic field experienced by the coupler device. In some cases, readout devices are each operably coupled to a single, respective qubit device to produce qubit readout signals that indicate the quantum state of the qubit device.

Abstract: In some aspects, a quantum computing system includes an electromagnetic waveguide system. The waveguide system has an interior surface that defines an interior volume of intersecting waveguides. Qubit devices are housed in the waveguide system. In some cases, the intersecting waveguides each define a cutoff frequency, and the qubit devices have qubit operating frequencies below the cutoff frequency. In some cases, coupler devices are housed in the waveguide system; each coupler device is configured to selectively couple a pair of neighboring qubit devices based on control signals received from a control source.

Abstract: In a general aspect, a microwave quantum circuit includes an on-chip impedance matching circuit. In some cases, a microwave quantum circuit includes a dielectric substrate, a quantum circuit device on the substrate, and an impedance matching circuit device on the substrate. The quantum circuit device includes a Josephson junction, and the impedance matching circuit device is coupled to the quantum circuit device on the substrate.

Abstract: In a general aspect, a quantum logic control sequence is generated for a quantum information processor. In some aspects, a quantum computation to be performed by a quantum information processor is identified. The quantum information processor includes data qubits and is configured to apply entangling quantum logic operations to respective pairs of the data qubits. A graph representing the quantum information processor is defined. The graph includes vertices and edges; the vertices represent the data qubits, and the edges represent the entangling quantum logic operations. A quantum logic control sequence is generated based on the graph. The quantum logic control sequence includes a sequence of quantum logic operations configured to perform the quantum computation when executed by the quantum information processor.

Abstract: In a general aspect, a superconducting quantum circuit system is modeled. In some aspects, a graph representing a quantum circuit system is generated. The graph includes vertices and edges; the edges represent circuit elements of the quantum circuit system, and the vertices represent physical connections between the circuit elements. Inverse inductances, conductances, capacitances, and junction inverse inductances are assigned to respective edges of the graph based on a lumped-element approximation of the quantum circuit system. A coordinate system is determined based on the graph, and a matrix representation of the system is determined based on the coordinate system. A Hamiltonian for the quantum circuit system is determined using the matrix representation, and the quantum circuit system is simulated based on the Hamiltonian.

Abstract: In a general aspect, a quantum logic gate is performed in a quantum computing system. In some cases, a pair of qubits are defined in a quantum processor; the pair of qubits can include a first qubit defined by a first qubit device in the quantum processor and a second qubit defined by a tunable qubit device in the quantum processor. A quantum logic gate can be applied to the pair of qubits by communicating a control signal to a control line coupled to the tunable qubit device. The control signal can be configured to modulate a transition frequency of the tunable qubit device at a modulation frequency, and the modulation frequency can be determined based on a transition frequency of the first qubit device.

Abstract: In some aspects, a heterogeneous computing system includes a quantum processor unit and a classical processor unit. In some instances, variables defined by a computer program are stored in a classical memory in the heterogeneous computing system. The computer program is executed in the heterogeneous computing system by operation of the quantum processor unit and the classical processor unit. Instructions are generated for the quantum processor by a host processor unit based on values of the variables stored in the classical memory. The instructions are configured to cause the quantum processor unit to perform a data processing task defined by the computer program. The values of the variables are updated in the classical memory based on output values generated by the quantum processor unit. The classical processor unit processes the updated values of the variables.

Abstract: In a general aspect, calibration is performed in a quantum computing system. In some cases, domains of a quantum computing system are identified, where the domains include respective domain control subsystems and respective subsets of quantum circuit devices in a quantum processor of the quantum computing system. Sets of measurements are obtained from one of the domains and stored in memory. Device characteristics of the quantum circuit devices of the domain are obtained based on the set of measurements, and the device characteristics are stored in a memory of the control system. Quantum logic control parameters for the subset of quantum circuit devices of the domain are obtained based on the set of measurements and stored in memory.

Abstract: In a general aspect, calibration is performed in a quantum computing system. In some cases, domains of a quantum computing system are identified, where the domains include respective domain control subsystems and respective subsets of quantum circuit devices in a quantum processor of the quantum computing system. Sets of measurements are obtained from one of the domains and stored in memory. Device characteristics of the quantum circuit devices of the domain are obtained based on the set of measurements, and the device characteristics are stored in a memory of the control system. Quantum logic control parameters for the subset of quantum circuit devices of the domain are obtained based on the set of measurements and stored in memory.

Abstract: In a general aspect, a qubit device includes two circuit loops. In some aspects, a first circuit loop includes a first Josephson junction, a second circuit loop includes a second Josephson junction, and the first and second loops are configured to receive a magnetic flux that defines a transition frequency of a qubit device. In some aspects, a quantum integrated circuit includes an inductor connected between a first circuit node and a second circuit node; the first Josephson junction connected in parallel with the inductor between the first circuit node and the second circuit node; and the second Josephson junction connected in parallel with the inductor between the first circuit node and the second circuit node.