Abstract: The present invention relates to a process for preparing at least one sheet silicate comprising Ga and/or Zn, and based thereon, a framework silicate, preferably of the RRO structure type, to the sheet silicate and framework silicate themselves and to the uses of the silicates, especially of the framework silicate, preferably as catalysts.
Type:
Grant
Filed:
November 20, 2015
Date of Patent:
March 12, 2019
Assignees:
BASF SE, RUBITEC-GESELLSCHAFT FUER INNOVATION UND TECHNOLOGIE DER RUHR-UNIVERSITAET BOCHUM MBH
Inventors:
Ulrich Mueller, Natalia Trukhan, Hermann Gies, Bart Tijsebaert, Csaba Varszegi, Dirk De Vos
Abstract: The present invention relates to a process for preparing at least one sheet silicate comprising Ga and/or Zn, and based thereon, a framework silicate, preferably of the RRO structure type, to the sheet silicate and framework silicate themselves and to the uses of the silicates, especially of the framework silicate, preferably as catalysts.
Type:
Application
Filed:
November 20, 2015
Publication date:
March 17, 2016
Applicants:
BASF SE, RUBITEC-GESELLSCHAFT FUER INNOVATION UND TECHNOLOGIE DER RUHR-UNIVERSITAET BOCHUM MBH
Inventors:
Ulrich MUELLER, Natalia TRUKHAN, Hermann GIES, Bart TIJSEBAERT, Csaba VARSZEGI, Dirk DE VOS
Abstract: The present invention relates to a process for preparing at least one sheet silicate comprising Ga and/or Zn, and based thereon, a framework silicate, preferably of the RRO structure type, to the sheet silicate and framework silicate themselves and to the uses of the silicates, especially of the framework silicate, preferably as catalysts.
Type:
Grant
Filed:
April 3, 2008
Date of Patent:
December 29, 2015
Assignees:
BASF SE, RUBITEC-GESELLSCHAFT FUER INNOVATION UND TECHNOLOGIE DER RUHR-UNIVERSITAET BOCHUM MBH
Inventors:
Ulrich Mueller, Natalia Trukhan, Hermann Gies, Bart Tijsebaert, Csaba Varszegi, Dirk De Vos
Abstract: An engagement detection circuit for a clock recovery circuit consisting of a phase detector (3), a counter element (6) and a flip-flop (8). By employing a low-pass element (12) and a trigger element (13) connected downstream, a preliminary and a final engagement of a phase control circuit can be detected with the engagement detection circuit. This provides a clock recovery circuit for controlling a phase control loop with a phase detector (20), a loop filter (21), a voltage-controlled oscillator (22) and a controllable frequency divider (23).
Type:
Grant
Filed:
November 2, 2000
Date of Patent:
November 19, 2002
Assignee:
Rubitec-Gesellschaft für Innovation und Technologie der
Ruhr Universität Bochum mbH