Abstract: A high speed comparator unit for a flash A/D converter in which a bank of comparator units compare simultaneously an analog input voltage with equally spaced reference voltages, and an encoder ROM produces digital signals based on the comparator unit's outputs. The comparator unit includes a two-stage cascode configuration and a level shifter configuration which effectively reduces the miller-effect of the comparator unit.
Type:
Grant
Filed:
July 14, 1988
Date of Patent:
March 20, 1990
Assignee:
Samsun Semiconductor and Telecommunications Co., Ltd.