Abstract: A capacitor component includes a body including a dielectric layer and internal electrode layers, with the dielectric layer interposed therebetween; and an external electrode disposed on the body and connected to the internal electrode layers. Each of the internal electrode layers has a capacitance formation portion disposed to overlap an adjacent internal electrode layer, and a lead-out portion extending from the capacitance formation portion and connected to the external electrode. A ratio (H2/H1) of a height difference H2 to a height difference H1 is 0.2 or less, where the height difference H2 is a height difference between the capacitance formation portion and the lead-out portion of a lowermost internal electrode layer the height difference H1 is a height difference between the capacitance formation portion and the lead-out portion of an uppermost internal electrode layer. An average thickness of the dielectric layer is 420 nm or less.

Abstract: A multilayer electronic component includes: a body including an active portion including internal electrodes disposed alternately with dielectric layers and cover portions disposed on upper and lower surfaces of the active portion; and external electrodes including an electrode layer disposed on the body, and an average thickness of the cover portion is 14 to 17 ?m and a maximum thickness of the electrode layer is 5 to 20 ?m.

Abstract: A multilayer electronic component includes a body including a dielectric layer and first and second internal electrodes disposed to oppose each other with the dielectric layer interposed therebetween and including a capacitance forming portion, by which capacitance of the multilayer electronic component is defined, having the first and second internal electrodes disposed to oppose each other with the dielectric layer interposed therebetween, cover portions disposed on two opposing surfaces of the capacitance forming portion in a first direction, and margin portions disposed on two opposing surfaces of the capacitance forming portion in a second or third direction, in which ?3.0<{1?(Hc/H1)}×100?0.4, where an average hardness of the cover portions is Hc and an average hardness of the first margin portions is H1.

Abstract: A reflective member includes an incident surface configured to receive incident light; a reflective surface configured to receive the incident light from the incident surface and reflect the incident light; an emission surface configured to receive the reflected light from the reflective surface and emit the reflected light; and a light blocking portion disposed on at least one edge of either one or both of the incident surface and the emission surface, wherein an end of the light blocking portion includes a plurality of convex portions and a plurality of concave portions.

Abstract: A multilayer electronic component includes: a body including a dielectric layer, and an internal electrode alternately disposed with the dielectric layer; and an external electrode disposed on the body and connected to the internal electrode. A composite layer containing Sn and Ni is disposed at an interface between the internal electrode and the dielectric layer. The internal electrode includes an interface portion between the composite layer and a central portion of the internal electrode. The interface portion includes a ceramic additive.

Abstract: A multilayer ceramic capacitor includes a body including a dielectric layer and first and second internal electrodes disposed with the dielectric layer interposed therebetween; first and second connection electrodes penetrating the body in a direction perpendicular to the dielectric layer and connected to the first internal electrode; third and fourth connection electrodes penetrating the body in a in a direction perpendicular to the dielectric layer and connected to the second internal electrode; first and second external electrodes disposed on both surfaces of the body, and connected to the first and second connection electrodes; and third and fourth external electrodes connected to the third and fourth connection electrodes, and at least a portion of the first and second connection electrodes is exposed to the surface of the body.

Abstract: An antenna device includes a dielectric layer disposed on a ground plane; a first patch antenna pattern disposed on the dielectric layer; first and second feed vias feeding an RF signal to the first patch antenna pattern; a first feed pattern connected to the first feed via, and coupled to the first patch antenna pattern; and a second feed pattern connected to the second feed via and coupled to the first patch antenna pattern. The first patch antenna pattern includes a first edge in parallel with a first direction, and a second edge in parallel with a second direction. The first feed pattern is disposed near the second edge, the second feed pattern is disposed near the first edge, and a first width of the first feed pattern measured in a second direction is different from a second width of the second feed pattern measured in the first direction.

Abstract: A multilayer capacitor includes a body including a stack structure in which at least one first internal electrode and at least one second internal electrode are alternately stacked in a first direction with at least one dielectric layer interposed therebetween; and first and second external electrodes spaced apart from each other and disposed on the body to be respectively connected to the at least one first internal electrode and the at least one second internal electrode, wherein each of the first and second external electrodes includes a first conductive layer including a first conductive material and glass; and an oxide layer including an oxide and disposed on at least a portion of an external surface of the first conductive layer.

Abstract: A camera module includes a housing, a reflective member positioned in the housing and changing a direction of light to a direction of an optical axis, a carrier carrying the reflective member and rotatable about a first axis with respect to the housing, and a first ball group disposed between the housing and the carrier, wherein the first ball group includes a main ball member providing the first axis of the carrier, and an auxiliary ball member disposed away from the first axis, and one or both of the housing and the carrier partially accommodates the auxiliary ball member, and includes an auxiliary guide groove extended in a circumferential direction of the first axis.

Abstract: A printed circuit board includes a first insulating layer, a plurality of first and second pads disposed on the first insulating layer, and a solder resist layer disposed on the first insulating layer, the solder resist layer having a plurality of first and second openings respectively exposing at least portions of the plurality of first and second pads. The first pad has a closed region having a side surface covered by the solder resist layer, and an open region having a side surface exposed by the first opening. The second pad has only a closed region having a side surface covered by the solder resist layer.

Abstract: A multilayered capacitor according to an embodiment includes a capacitor body including a dielectric layer and a first internal electrode layer and a second internal electrode layer stacked with the dielectric layer interposed therebetween, a first external electrode and a second external electrode on both sides of the capacitor body in the longitudinal direction, and 2n or more terminal electrodes on both sides of the capacitor body in a width direction. The first internal electrode layer includes n+1 first internal electrode patterns, the second internal electrode layer includes n second internal electrode patterns, and n is an integer greater than or equal to 1.

Abstract: A method of manufacturing a multilayer electronic component includes cutting a stack, in which internal electrode patterns and ceramic green sheets are alternately stacked in a stacking direction, to obtain unit chips and attaching a portion of a ceramic green sheet for a side margin portion to the unit chips in a direction, different from the stacking direction. The attaching includes attaching the portion of the ceramic green sheet to the unit chips by compression between a first elastic body on which the ceramic green sheet is disposed and the unit chips. The first elastic body includes a first elastic layer having and a second elastic layer having an elastic modulus different from the first elastic layer, and disposed between the unit chips and the first elastic layer. An elastic modulus of the first elastic body is greater than 50 MPa and less than or equal to 1000 MPa.

Abstract: An imaging lens system includes a first lens, a second lens, a third lens, a fourth lens, a fifth lens, a sixth lens, a seventh lens, and an eighth lens sequentially arranged at intervals from an object side. The first lens and the fifth lens have negative refractive power, the sixth lens has a concave object-side surface, and the imaging lens system satisfies the following conditional expression: ?1.0<f1/f2<?0.10 where f1 is a focal length of the first lens and f2 is a focal length of the second lens.

Abstract: A multilayered capacitor includes a capacitor body including dielectric layers, a pair of first internal electrode layers with a first one of the dielectric layers interposed therebetween and a pair of second internal electrode layers stacked with a second one of the dielectric layers interposed therebetween, and a first external electrode and a second external electrode on both sides of the capacitor body in a longitudinal direction of the capacitor body. The pair of first internal electrode layers are respectively connected to the first external electrode and the second external electrode and the pair of second internal electrode layers are respectively connected to the first external electrode and the second external electrode. In a width direction of the capacitor body, an average length of the pair of first internal electrode layers and an average length of the pair of second internal electrode layers are different.

Abstract: A ceramic electronic component includes a body including a dielectric layer and an internal electrode, and an external electrode disposed on the body and connected to the internal electrode. The dielectric layer includes a plurality of dielectric grains, and at least one of the plurality of dielectric grains has a core-dual shell structure having a core and a dual shell. The dual shell includes a first shell surrounding at least a portion of the core, and a second shell surrounding at least a portion of the first shell, and a concentration of a rare earth element included in the second shell is more than 1.3 times to less than 3.8 times a concentration of a rare earth element included in the first shell.

Abstract: An electronic component includes a body, a pair of external electrodes, disposed on both ends of the body in a first direction, respectively, containing at least one of copper and nickel, while not containing a noble metal, a pair of metal frames connected to the pair of external electrodes, respectively, and a pair of conductive bonding layers, disposed between the external electrode and the metal frame, respectively, containing the same metal component as the external electrode.

Abstract: A multilayer electronic component includes a body including a dielectric layer and internal electrodes disposed alternately with the dielectric layer therebetween and including first and second surfaces opposing each other in a first direction, third and fourth surfaces opposing each other in a second direction, and external electrodes disposed on the body. One end of each internal electrode is connected to the third or fourth surface. The external electrodes include a first electrode layer disposed on the third and fourth surfaces and including a conductive metal and a second electrode layer disposed on the first electrode layer, including silver (Ag) and glass, and further including one or more of palladium (Pd), platinum (Pt), and gold (Au), and the first electrode layer is disposed to cover all of one end of each internal electrode connected to the third and fourth surfaces and does not extend to the other surfaces.

Abstract: A package-embedded board includes: a core layer having a through-hole portion; a package at least partially disposed in the through-hole portion and including a die pad, an electronic component disposed on the die pad, and a molded portion covering the electronic component; and a core insulating material disposed in the through-hole portion and covering the core layer and the package.

Abstract: A multilayer capacitor includes: a body including a capacitance region in which at least one first internal electrode and at least one second internal electrode are alternately stacked on each other interposing at least one dielectric layer therebetween in a first direction; and first and second external electrodes disposed on the body and spaced apart from each other to be respectively connected to the at least one first internal electrode and the at least one second internal electrode, wherein the body includes a side margin overlapping none of the at least one first internal electrode and the at least one second internal electrode in the first direction, and a center width of the side margin is greater than a minimum width of the side margin.

Abstract: An optical imaging system includes a first lens having an image-side surface that is concave; a second lens having a refractive power; a third lens having an object-side surface that is convex; a fourth lens having an image-side surface that is concave; a fifth lens having a refractive power; and a sixth lens having a refractive power and an image-side surface having an inflection point, wherein the first lens through the sixth lens are sequentially disposed in numerical order from an object side of the optical imaging system toward an imaging plane of the optical imaging system, and the optical imaging system satisfies TL/(2Y)?1.01 and 1.2?tan ?, where TL is a distance from an object-side surface of the first lens to the imaging plane, 2Y is a diagonal length of the imaging plane, and ? is half a field of view of the optical imaging system.