Abstract: A method for writing servo onto a disk of a hard disk drive with a servo writer. The method includes writing a plurality of spiral servo signals onto a disk. The spiral servo signals include a plurality of short spirals separated by unequal distances. The short spirals are detected by determining the unequal distances and used to write a plurality of servo patterns. The unequal distances provide information of the short spirals at different quadrants of the disk. The distances between a bank of odd short spirals is different than a bank of even short spirals which allows the servo writer to determine whether the bank is odd or even without switching banks. Either the even or odd bank of short spirals can be used to locate a starting reference point from which the servo writer can count spirals and write A, B, C and D servo bursts.

Abstract: A plasma generating apparatus having superior plasma generation efficiency that uses a single reaction chamber. The plasma generating apparatus includes a RF generator for providing a RF power, an antenna for generating an electromagnetic field upon receiving the RF power, a reaction chamber for exciting/ionizing a reaction gas via the electromagnetic field, and generating a plasma, and a plasma channel for absorbing the RF power, and allowing a current signal to be induced to the plasma.

Abstract: The invention applies to servo controllers for at least the voice coil motor of a hard disk drive. Today, many control algorithms require 80 to 90 percent of the sampling period to complete their calculation of the next control, making computation time delay no longer negligible. The invention accommodates the transport delay, such as computation time delay, into the state estimator and into the whole control system. Experimental results using a commercial hard drive, as well as simulation results, show that the invention's method effectively improves the hard disk drive control system stability by increasing the phase margin and gain margin. The invention includes the method of operating the servo-controller, as well as the apparatus implementing that method. The invention also includes hard disk drives containing servo-controllers implementing the method, and program systems residing in accessibly coupled memory to a computer within the servo controller implementing the method.

Abstract: A self-dispersible coloring agent represented by formula (II) below is prepared by incorporating a hydrophilic group into a coloring agent through a reaction of a hydrophilic group-containing halide represented by formula (I) below and the coloring agent in the presence of a Lewis acid catalyst: X-L-R1??(I) (the coloring agent)-L-R1??(II) wherein L represents a single bond or —C(?O)—; R1 is selected from the group consisting of a substituted or unsubstituted C1-C20 alkyl group containing a hydrophilic group, a substituted or unsubstituted C6-C20 aryl group containing a hydrophilic group a substituted or unsubstituted C2-C20 heteroaryl group containing a hydrophilic group and a substituted or unsubstituted C7-C20 arylalkyl group containing a hydrophilic group; and X is one of: —F, —Br, —I and —Cl. may be obtained conveniently through a one-step process.

Abstract: A liquid crystal display (“LCD”) device reduces the size of a liquid crystal (“LC”) panel by reducing the number of data voltage supply lines of the LC panel. The LCD device includes sub-pixels formed in a display area of a substrate, data lines formed in the display area in a column direction and commonly connected to the sub-pixels, gate lines crossing the data lines and respectively connected to the sub-pixels, data voltage supply lines receiving a data voltage from outside and supplying the data voltage to the data lines, branch lines branched from each of the data voltage supply lines, and switching elements formed between the branch lines and the data lines and selectively connecting the branch lines with the data lines. A method of driving the LCD device is further provided.

Abstract: A method of converting a parity check matrix for low density parity check coding comprising moving rows and columns of the parity check matrix such that the parity check matrix includes a lower triangular submatrix. A calculation load for creating parity information can be reduced by using the converted parity check matrix including the lower triangular submatrix.

Abstract: A semiconductor device includes a word line structure that extends in a first direction on an active region defined on a substrate. First and second contact pads are formed on the active region at both sides of the word line structure. Bit line structures are electrically connected to the first contact pad and extend in a second direction substantially perpendicular to the first direction. An insulation layer structure is formed on the substrate having the bit line structures. A storage node contact plug is electrically connected to the second contact pad through the insulation layer structure. A storage node electrode, which may be part of a capacitor, is formed on the storage node contact plug. The storage node contact plug has a lower portion and an upper portion having a width wider than that of the lower portion, with vertical sides perpendicular to the first and second directions.

Abstract: A tilt compensating device and method of performing normal tilt compensation in the event of a servo emergency which may occur during reproduction of data from an optical recording medium are provided. The tilt compensating device includes: an optical pickup; a tilt adjusting unit that adjusts a tilt angle of the optical pickup; a jitter detecting unit that detects an amount of jitter in a reproduction signal output from the optical pickup; and a controlling unit that monitors speed at which the optical recording medium operates using a phase-locked loop (PLL) signal generated from the reproduction signal and the degree of focus of the optical pickup, performs an operation to return to a normal state if any abnormality occurs, and controls operation of the tilt adjusting unit by comparing an amount of jitter detected at regular intervals against a reference.

Abstract: A double data rate (“DDR”) synchronous dynamic random access memory (“SDRAM”) semiconductor device is provided that prevents a conflict between data read from and data written to the DDR SDRAM semiconductor device when data is written to the DDR SDRAM semiconductor device, which includes a delay locked loop (“DLL”) circuit, a clock signal control unit, an output unit, and an output control unit, where the DLL circuit compensates for skew of an input clock signal and generates an output clock signal; the clock signal control unit receives a read signal activated when data stored in the DDR SDRAM semiconductor device is read out, a DLL locking signal activated when the DLL circuit performs a locking operation on the input clock signal, and the output clock signal, and outputs the output clock signal when either the read signal or the DLL locking signal is active; the output unit buffers data stored in the DDR SDRAM semiconductor device and outputs the data to outside of the DDR SDRAM semiconductor device in syn

Abstract: A half-tone phase shift mask includes a transparent substrate, a phase shift pattern formed on the semiconductor substrate and having a stepped aperture which exposes the transparent substrate by a predetermined width, and an opaque film pattern formed on the upper surface of the phase shift pattern. The stepped aperture is defined by an interior side wall of the phase shift pattern. This side wall includes a horizontal surface which is parallel to the surface defining the bottom of the aperture. Light transmitted by the mask via the surface defining the bottom of the aperture has a phase difference of 180 degrees with respect to light transmitted by the mask via the horizontal surface, and light transmitted by the mask via the surface defining the bottom of the aperture has a phase difference of more than 180 degrees with respect to light transmitted by the mask via the upper surface of the phase shift pattern.

Abstract: A phase shifting mask (PSM) for manufacturing a semiconductor device and a method of fabricating the same includes a transparent substrate, a main pattern formed on the transparent substrate and comprising a first phase shifting layer having a first optical transmittance greater than 0, and at least one assistant pattern formed on the transparent substrate proximal to the main pattern for phase-shifting by the same degree as the main pattern and having a second optical transmittance, which is less than the first optical transmittance.

Abstract: A nonvolatile semiconductor memory device has a memory block including a string having a string select transistor responsive to a string select line, a ground select transistor responsive to a ground select line, and a plurality of EEPROM cells responsive to a corresponding plurality of word lines, the plurality of EEPROM cells being serially connected between the string select transistor and the ground select transistor. A first block select transistor is coupled to the ground select transistor. A second block select transistor is coupled to the string select transistor. A plurality of third block select transistors is coupled to the plurality of word lines. A voltage control means provides a first voltage to the first block select transistor and a second voltage to the third block select transistors, the first voltage being less than the second voltage during programming.

Abstract: The present invention provides a fuse of a semiconductor device and a method of forming a fuse of a semiconductor device. The method of the invention includes forming an underlying metal conductor on a semiconductor substrate, forming an insulating film over the underlying metal conductor, and selectively etching regions of the insulating film. One of the regions of the insulating film is etched to form a via contact region exposing the underlying metal conductor. A second region is etched to form a groove in the insulating film for the fuse metal. Metal is buried within the second etched region of the insulating film and the via contact region to respectively form a fuse metal pattern and a via contact metal layer.

Abstract: Methods of forming electrically conductive lines include the steps of forming a first electrically insulating layer (e.g., SiO.sub.2) on a face of a semiconductor substrate and then forming a layer of polycrystalline silicon (polysilicon) as a blanket layer on the first electrically insulating layer. A metal silicide layer (e.g., TiSix) is then formed on the polysilicon layer by reacting the polysilicon layer with an appropriate metal such as titanium (Ti) using a thermal treatment step. Thereafter, a second electrically insulating layer (e.g., SiO.sub.2, Si.sub.3 N.sub.4) is formed on the metal silicide layer using conventional techniques. A layer of photoresist is then deposited onto the second electrically insulating layer and patterned as an etching mask using conventional photolithographic processing steps.

Abstract: An EEPROM device in which a high voltage is applied to the chip during the memory cell operation and a method for the manufacturing the same are disclosed. On a P-type semiconductor substrate, a first N-well is formed in a surface portion of the substrate in the cell array region and a second N-well is formed in a first surface of the substrate in the peripheral circuit region. An EEPROM memory cell is formed on the first P-well and a first NMOS transistor is formed on the second P-well. Also, a second NMOS transistor is formed on a second surface portion of the semiconductor substrate in the peripheral circuit 10 region and a PMOS transistor is formed on the second N-well. The impurity concentrations of the first and second P-wells are controlled in accordance with the characteristic of the MOS transistors to be formed. Further, a second NMOS transistor having a resistance against a high voltage is directly formed on the P-type substrate. Thus, the electric characteristic of the EEPROM device is enhanced.