Patents Assigned to Sanmina-SCI Corporation
-
Patent number: 9390035Abstract: A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus.Type: GrantFiled: December 21, 2010Date of Patent: July 12, 2016Assignee: SANMINA-SCI CORPORATIONInventors: Jonathan R. Hinkle, Paul Sweere
-
Patent number: 9161447Abstract: A novel method for manufacturing embedded a capacitive stack and a novel capacitive stack apparatus are provided having a capacitive core that serves as a structural substrate on which alternating thin conductive foils and nanopowder-loaded dielectric layers may be added and tested for reliability. This layering and testing allows early fault detection of the thin dielectric layers of the capacitive stack. The capacitive stack may be configured to supply multiple isolated capacitive elements that provide segregated, device-specific decoupling capacitance to one or more electrical components. The capacitive stack may serve as a core substrate on which a plurality of additional signaling layers of a multilayer circuit board may be coupled.Type: GrantFiled: March 10, 2008Date of Patent: October 13, 2015Assignee: Sanmina-SCI CorporationInventor: George Dudnikov
-
Patent number: 9158716Abstract: A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus.Type: GrantFiled: April 7, 2011Date of Patent: October 13, 2015Assignee: Sanmina-SCI CorporationInventors: Jonathan R. Hinkle, Paul Sweere
-
Patent number: 9019792Abstract: A memory device is provided comprising: a volatile memory device, a non-volatile memory device, a memory control circuit volatile memory controller coupled to the volatile memory device and non-volatile memory device, and a backup power source. The backup power source may be arranged to temporarily power the volatile memory devices and the memory control circuit upon a loss of power from the external power source. Additionally, a switch may serve to selectively couple: (a) a host memory bus to either the volatile memory device or non-volatile memory device; and (b) the volatile memory device to the non-volatile memory device. Upon reestablishment of power by an external power source from a power loss event, the memory control circuit is configured to restore data from the non-volatile memory device to the volatile memory device prior to a host system, to which the memory device is coupled, completes boot-up.Type: GrantFiled: November 13, 2012Date of Patent: April 28, 2015Assignee: Sanmina-SCI CorporationInventors: Paul Sweere, Jonathan R. Hinkle
-
Patent number: 8842018Abstract: Methods and/or devices are provided for monitoring life-expectancy and/or useful life of an optical transceiver module by tracking an insertion cycle count of an optical transceiver module. An alarm/warning indicator may be generated or the optical transceiver module can be disabled completely if the insertion cycle count exceeds a predefined threshold. The host device first detects the insertion of the optical transceiver module and then reads the cycle count along with an identifier value from the non-volatile memory of the optical transceiver module. The host device then increments the insertion cycle count by one, to account for the current insertion, and stores this new cycle count into a non-volatile memory of the optical transceiver module. The insertion cycle count value may be encrypted and/or the non-volatile memory of the optical transceiver module may be password-protected to avoid accidental and/or unauthorized access to the non-volatile memory of the optical transceiver module.Type: GrantFiled: October 17, 2010Date of Patent: September 23, 2014Assignee: Sanmina-SCI CorporationInventors: Asif Hussain, Joshua Chien, Sushil Dhiman
-
Patent number: 8713769Abstract: A novel method for manufacturing embedded a capacitive stack and a novel capacitive stack apparatus are provided having a capacitive core that serves as a structural substrate on which alternating thin conductive foils and nanopowder-loaded dielectric layers may be added and tested for reliability. This layering and testing allows early fault detection of the thin dielectric layers of the capacitive stack. The capacitive stack may be configured to supply multiple isolated capacitive elements that provide segregated, device-specific decoupling capacitance to one or more electrical components. The capacitive stack may serve as a core substrate on which a plurality of additional signaling layers of a multilayer circuit board may be coupled.Type: GrantFiled: March 10, 2008Date of Patent: May 6, 2014Assignee: Sanmina-Sci CorporationInventor: George Dudnikov
-
Patent number: 8667675Abstract: Systems and methods for simultaneously partitioning a plurality of via structures into electrically isolated portions by using plating resist within a PCB stackup are disclosed. Such via structures are made by selectively depositing plating resist in one or more locations in a sub-composite structure. A plurality of sub-composite structures with plating resist deposited in varying locations are laminated to form a PCB stackup of a desired PCB design. Through-holes are drilled through the PCB stackup through conductive layers, dielectric layers and through the plating resist. Thus, the PCB panel has multiple through-holes that can then be plated simultaneously by placing the PCB panel into a seed bath, followed by immersion in an electroless copper bath. Such partitioned vias increase wiring density and limit stub formation in via structures. Such partitioned vias allow a plurality of electrical signals to traverse each electrically isolated portion without interference from each other.Type: GrantFiled: August 12, 2008Date of Patent: March 11, 2014Assignee: Sanmina Sci CorporationInventor: George Dudnikov, Jr.
-
Patent number: 8656072Abstract: A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus.Type: GrantFiled: September 19, 2011Date of Patent: February 18, 2014Assignee: Sanmina-SCI CorporationInventors: Jonathan R. Hinkle, Paul Sweere
-
Patent number: 8583869Abstract: A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus.Type: GrantFiled: April 7, 2011Date of Patent: November 12, 2013Assignee: Sanmina-SCI CorporationInventors: Jonathan R. Hinkle, Paul Sweere
-
Patent number: 8552867Abstract: A radio frequency identification (RFID) tag is coupled to a circuit board to track the specific operating and environmental conditions of each stage as the circuit board passes through one or more manufacturing and/or post-manufacturing stages. An RFID reader and data collector are used at each stage to read the RFID tag and store its identifying information along with processing information, operating conditions, and results for each stage. This permits to quickly and accurately collect manufacturing and post-manufacturing information for each circuit board at various stages as well as the operating conditions for each stage at a particular time. Such manufacturing and/or post-manufacturing metrics can then be retrieved on a stage-by-stage basis for a particular circuit board by an identifier associated with the circuit board.Type: GrantFiled: September 15, 2011Date of Patent: October 8, 2013Assignee: Sanmina-SCI CorporationInventors: Rony Shachar, Srivats Ramaswami, David Anderson
-
Publication number: 20130148457Abstract: A memory device is provided comprising: a volatile memory device, a non-volatile memory device, a memory control circuit volatile memory controller coupled to the volatile memory device and non-volatile memory device, and a backup power source. The backup power source may be arranged to temporarily power the volatile memory devices and the memory control circuit upon a loss of power from the external power source. Additionally, a switch may serve to selectively couple: (a) a host memory bus to either the volatile memory device or non-volatile memory device; and (b) the volatile memory device to the non-volatile memory device. Upon reestablishment of power by an external power source from a power loss event, the memory control circuit is configured to restore data from the non-volatile memory device to the volatile memory device prior to a host system, to which the memory device is coupled, completes boot-up.Type: ApplicationFiled: November 13, 2012Publication date: June 13, 2013Applicant: SANMINA-SCI CORPORATIONInventor: SANMINA-SCI CORPORATION
-
Publication number: 20130142001Abstract: A memory module is provided comprising a substrate having an interface to a host system, volatile memory, non-volatile memory, and a logic device. The logic device may receive the indicator of an external triggering event and copies data from the volatile memory devices to the non-volatile memory devices upon receipt of such indicator. When the indicator of the triggering event has cleared, the logic device restores the data from the non-volatile to the volatile memory devices. The memory module may include a passive backup power source (e.g., super-capacitor) that is charged by an external power source and temporarily provides power to the memory module to copy the data from volatile to non-volatile memory. A voltage detector within the memory module may monitor the voltage of an external power source and generates an indicator of a power loss event if voltage of the external power source falls below a threshold level.Type: ApplicationFiled: November 13, 2012Publication date: June 6, 2013Applicant: SANMINA-SCI CORPORATIONInventor: SANMINA-SCI CORPORATION
-
Publication number: 20130112465Abstract: A printed circuit board (PCB) is provided comprising a plurality of non-conductive layers with conductive or signal layers in between. The PCB includes a first conductive via traversing the plurality of non-conductive and conductive or signal layers as well as a second conductive via traversing the plurality of non-conductive layers and conductive or signal layers, the second conductive via located substantially parallel to the first conductive via. An embedded electro-optical passive element is also provided that extends perpendicular to and between the first conductive via and the second conductive via. The electro-optical passive element embedded is located within a selected layer at a first depth in the printed circuit board, wherein such first depth is selected to reflect an incident electromagnetic wave back into the printed circuit board to enhance or diminish an electrical signal in the first conductive via by creating a positive or negative electromagnetic interference.Type: ApplicationFiled: November 9, 2012Publication date: May 9, 2013Applicant: SANMINA-SCI CORPORATIONInventor: SANMINA-SCI CORPORATION
-
Patent number: 8325554Abstract: A memory module is provided comprising a substrate having an interface to a host system, volatile memory, non-volatile memory, and a logic device. The logic device may receive the indicator of an external triggering event and copies data from the volatile memory devices to the non-volatile memory devices upon receipt of such indicator. When the indicator of the triggering event has cleared, the logic device restores the data from the non-volatile to the volatile memory devices. The memory module may include a passive backup power source (e.g., super-capacitor) that is charged by an external power source and temporarily provides power to the memory module to copy the data from volatile to non-volatile memory. A voltage detector within the memory module may monitor the voltage of an external power source and generates an indicator of a power loss event if voltage of the external power source falls below a threshold level.Type: GrantFiled: July 9, 2009Date of Patent: December 4, 2012Assignee: Sanmina-Sci CorporationInventors: Paul Sweere, Jonathan R. Hinkle
-
Patent number: 8320116Abstract: A built-in dual purpose interposer device for a data storage device carrier mechanism is provided. The interposer device may fill empty or voided space in the carrier mechanism created when a data storage device is changed between a “direct plug” position, or first configuration, and an “interposer” position, or second configuration. The interposer device may be changed back and forth between the first and second configuration multiple times. When in the first configuration, the interposer device may provide structural support to a front end of the carrier mechanism and when in the second configuration, the interposer device may provide an internal mounting base for the data storage device at the base or bottom end of the carrier mechanism. The ability to interchange the interposer device may provide for a built-in base for attaching the interposer device without having to add in additional parts or costs.Type: GrantFiled: August 17, 2010Date of Patent: November 27, 2012Assignee: Sanmina-SCI CorporationInventor: Jeffrey David Wilke
-
Patent number: 8222537Abstract: Systems and methods for simultaneously partitioning a plurality of via structures into electrically isolated portions by using plating resist within a PCB stackup are disclosed. Such via structures are made by selectively depositing plating resist in one or more locations in a sub-composite structure. A plurality of sub-composite structures with plating resist deposited in varying locations are laminated to form a PCB stackup of a desired PCB design. Through-holes are drilled through the PCB stackup through conductive layers, dielectric layers and through the plating resist. Thus, the PCB panel has multiple through-holes that can then be plated simultaneously by placing the PCB panel into a seed bath, followed by immersion in an electroless copper bath. Such partitioned vias increase wiring density and limit stub formation in via structures. Such partitioned vias allow a plurality of electrical signals to traverse each electrically isolated portion without interference from each other.Type: GrantFiled: June 11, 2009Date of Patent: July 17, 2012Assignee: Sanmina-Sci CorporationInventors: George Dudnikov, Jr., Franz Gisin
-
Publication number: 20120159045Abstract: A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus.Type: ApplicationFiled: September 19, 2011Publication date: June 21, 2012Applicant: SANMINA-SCI CORPORATIONInventors: Jonathan R. Hinkle, Paul Sweere
-
Publication number: 20120146794Abstract: A radio frequency identification (RFID) tag is coupled to a circuit board to track the specific operating and environmental conditions of each stage as the circuit board passes through one or more manufacturing and/or post-manufacturing stages. An RFID reader and data collector are used at each stage to read the RFID tag and store its identifying information along with processing information, operating conditions, and results for each stage. This permits to quickly and accurately collect manufacturing and post-manufacturing information for each circuit board at various stages as well as the operating conditions for each stage at a particular time. Such manufacturing and/or post-manufacturing metrics can then be retrieved on a stage-by-stage basis for a particular circuit board by an identifier associated with the circuit board.Type: ApplicationFiled: September 15, 2011Publication date: June 14, 2012Applicant: SANMINA-SCI CORPORATIONInventors: Rony Shachar, Srivats Ramaswami, David Anderson
-
Patent number: 8188866Abstract: A radio frequency identification (RFID) tag is coupled to a circuit board to track the specific operating and environmental conditions of each manufacturing stage as the circuit board passes through the manufacturing stages. An RFID reader and data collector are used at each stage to read the RFID tag and store its identifying information along with processing information, operating conditions, and results for each stage. This permits to quickly and accurately collect manufacturing information for each circuit board at various manufacturing stages as well as the operating conditions for each stage at a particular time. Such manufacturing metrics can then be retrieved on a stage-by-stage basis for a particular circuit board by an identifier printed on the circuit board.Type: GrantFiled: February 20, 2011Date of Patent: May 29, 2012Assignee: Sanmina-SCI CorporationInventor: Rony Shachar
-
Patent number: 8156640Abstract: The protection of sensitive components on printed circuit boards by using planar transient protection material in one or more layers of a printed circuit board stackup is disclosed.Type: GrantFiled: October 4, 2008Date of Patent: April 17, 2012Assignee: Sanmina-SCI CorporationInventors: George Dudnikov, Jr., Franz Gisin, Gregory J. Schroeder