Patents Assigned to Seagate Technology
  • Patent number: 11917062
    Abstract: Key rotation verification without decryption is provided. Two ciphertext inputs encrypted from a plaintext input by an encryption function using different cryptographic keys are input, wherein the encryption function is selected from a function family having an output space of one or more convex sets. A divergence between the two ciphertext inputs is computed. A membership oracle is executed on the two ciphertext inputs, wherein the two ciphertext inputs are determined to be members of the same convex set of the one or more convex sets if the computed divergence satisfies a separation condition. The two ciphertext inputs are validated to both correspond to the same plaintext input, responsive to determining that the two ciphertext inputs are members of the same convex set, wherein the two ciphertext inputs do not correspond to the same plaintext input if the two ciphertext inputs are not members of the same convex set.
    Type: Grant
    Filed: May 25, 2022
    Date of Patent: February 27, 2024
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Vipin Singh Sehrawat, Josip Relota
  • Patent number: 11913130
    Abstract: A data storage device comprising a recording head having a high damping magnetic alloy layer including at least one magnetic alloy element, and a 5d transition element; the high damping magnetic alloy layer having a mixed face-centered cubic (fcc) and body-centered cubic (bcc) crystal structure, and the mixed fcc and bcc crystal structure comprising fcc and bcc grains, with the bcc grains having an elongated shape relative to the fcc grains, a larger size than the fcc grains, and slip deformation, thereby providing the high damping magnetic alloy layer with a damping constant of up to about 0.07.
    Type: Grant
    Filed: June 2, 2022
    Date of Patent: February 27, 2024
    Assignee: Seagate Technology LLC
    Inventors: Jie Gong, Steven C. Riemer, John A. Rice, Hilton Erskine, Michael C. Kautzky, Xuelian Xu
  • Patent number: 11907392
    Abstract: A function is decomposed into a plurality of function shares. The function returns a Boolean result based on whether an input y satisfies a query on a data set. The function shares hide the function from non-collaborating entities that separately execute the function shares. Each of the functions shares are sent to one of a plurality of servers having a same data set. The function shares are executed on the data set at the servers to obtain a respective plurality of shares. A conditional disclosure of secrets operation is simulated on the shares and the input y. The conditional disclosure of secrets operation uses a secret known to at least one of the servers, and further uses a source of randomness shared between the servers. A Boolean value corresponding to the Boolean result is returned based on the conditional disclosure of secrets operation returning the secret.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: February 20, 2024
    Assignee: Seagate Technology LLC
    Inventors: Nolan Miranda, Vipin Singh Sehrawat, Foo Yee Yeo
  • Patent number: 11908504
    Abstract: A memory device formed of ferroelectric field effect transistors (FeFETs). The memory device can be used as a front end buffer, such as in a data storage device having a non-volatile memory (NVM). A controller can be configured to transfer user data between the NVM and an external client (host) via the buffer. The FeFETs can be arranged in a two-dimensional (2D) or a three-dimensional (3D) array. A monitor circuit can be used to monitor operation of the FeFETs. An optimization controller can be used to adjust at least one operational parameter associated with the FeFETs responsive to the monitored operation by the monitor circuit. The FeFETs may require a refresh operation after each read operation. A power down sequence can involve a read operation without a subsequent refresh operation to wipe the FeFETs, the read operation jettisoning the data read from the buffer memory.
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: February 20, 2024
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Jon D. Trantham, Praveen Viraraghavan, John W. Dykes, Ian J. Gilbert, Sangita Shreedharan Kalarickal, Matthew J. Totin, Mohamad El-Batal, Darshana H. Mehta
  • Patent number: 11908502
    Abstract: A method for reducing noise in a read signal due attributable to read element asymmetry provides for transmitting a write signal through a write precompensation circuit that shifts rising edges and falling edges of each of pulse in the write signal by a select magnitude and in opposite directions. After the write signal is encoded on a media, a corresponding read signal is read, with a read element, from the media. The method further provides for transmitting the read signal through a magnetoresistive asymmetry compensation (MRAC) block that is tuned to correct second-order non-linearities characterized by a particular set of distortion signatures. The select magnitude of the waveform shift applied by the write precompensation circuit introduces a non-linear signal characteristic that combines with non-linear signal characteristics introduced by the read element to generate one of the particular distortion signatures that is correctable by the MRAC block.
    Type: Grant
    Filed: March 14, 2022
    Date of Patent: February 20, 2024
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Walter R. Eppler, Drew Michael Mader
  • Patent number: 11901013
    Abstract: Method and apparatus for managing data in a non-volatile memory (NVM) of a storage device, such as a solid-state drive (SSD). Data are stored to and retrieved from a group of memory cells in the NVM using a controller circuit. The data are retrieved using a first set of read voltages which are applied to the respective memory cells. The first set of read voltages are accumulated into a history distribution, which is evaluated to arrive at a second set of read voltages based upon characteristics of the history distribution. A calibration operation is performed on the memory cells using the second set of read voltages as a starting point. A final, third set of read voltages is obtained during the calibration operation to provide error rate performance at an acceptable level. The third set of read voltages are thereafter used for subsequent read operations.
    Type: Grant
    Filed: December 3, 2021
    Date of Patent: February 13, 2024
    Assignee: Seagate Technology LLC
    Inventors: Stacey Secatch, Jonathan Henze
  • Patent number: 11899952
    Abstract: A system can log data access activity to a memory array with a metadata module while the memory array is logically divided into multiple namespaces. A workload can be determined for each namespace by the metadata module and a metadata strategy can be created with the metadata module in view of the respective namespace workloads. A first metadata and second metadata may be generated for respective first and second user-generated data for storage into a first namespace of the multiple namespaces. The first metadata can be compressed with a compression level prescribed by the metadata strategy in response to a detected or predicted workload to the first namespace before the first metadata, second metadata, first user-generated data, and second user-generated data are each stored in the first namespace.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: February 13, 2024
    Assignee: Seagate Technology LLC
    Inventors: Ryan James Goss, David W. Claude, Daniel J. Benjamin, Thomas V. Spencer, Matthew B. Lovell
  • Patent number: 11900965
    Abstract: A data storage device includes a disc, an actuator arm assembly, a servo clock, and a feedback and control system. The disc includes a top and bottom surfaces and a servo wedge. The servo wedge includes a top surface boundary and a bottom surface boundary. The actuator arm assembly supports a head pair configured for interaction with the top and bottom surfaces. The servo clock is configured to determine a top time at which the head pair encounters the top surface boundary and a bottom time at which the head pair encounters the bottom surface boundary during a disc read/write interaction. The feedback and control system is configured to determine an operation time difference; compare the operation time difference to a certification time difference correlating to a target vertical position of the actuator arm assembly relative to the disc; and move the actuator arm assembly to the target vertical position.
    Type: Grant
    Filed: February 14, 2022
    Date of Patent: February 13, 2024
    Assignee: Seagate Technology LLC
    Inventors: Xiong Liu, Choon Kiat Lim, June Christian Ang, Yichao Ma
  • Patent number: 11900963
    Abstract: A heat-assisted magnetic recording head comprises a near-field transducer (NFT). The NFT comprises a near-field emitter configured to heat a surface of a magnetic disk, and a hybrid plasmonic disk. The hybrid plasmonic disk comprises a plasmonic region and a thermal region. The plasmonic region comprises a first material or alloy that is a plasmonic material or alloy. The thermal region comprises a second material or alloy that is different than the first material or alloy.
    Type: Grant
    Filed: June 16, 2022
    Date of Patent: February 13, 2024
    Assignee: Seagate Technology LLC
    Inventors: Yuhang Cheng, Tae-Woo Lee, Michael A Seigler, Yang Wu
  • Patent number: 11900970
    Abstract: Systems and methods are disclosed for magnetoresistive asymmetry compensation using a hybrid analog and digital compensation scheme. In certain embodiments, a method may comprise receiving an analog signal at a continuous-time front end (CTFE) circuit, and performing, via the CTFE circuit, first magnetoresistive asymmetry (MRA) compensation on the analog signal to adjust the dynamic range of the analog signal based on an input range of an analog-to-digital converter (ADC). The method may further comprise converting the analog signal to a digital sample sequence via the ADC, and performing, via a digital MRA compensation circuit, second MRA compensation to correct residual MRA in the digital sample sequence. Offset compensation may also be performed in both the analog and digital domains.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: February 13, 2024
    Assignee: Seagate Technology LLC
    Inventors: Jason Bellorado, Marcus Marrow, Zheng Wu
  • Patent number: 11899590
    Abstract: A data storage system can employ a read destructive memory configured to fill a first cache with a first data set from a data repository prior to populating a second cache with a second data set describing the first data set with the first and second cache each having non-volatile ferroelectric memory cells. An entirety of the first cache may be read in response to a cache hit in the second cache with the cache hit responsive to a data read command from a host and with the first cache being read without a refresh operation restoring the data of the first cache.
    Type: Grant
    Filed: June 20, 2022
    Date of Patent: February 13, 2024
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Jon D. Trantham, Praveen Viraraghavan, John W. Dykes, Ian J. Gilbert, Sangita Shreedharan Kalarickal, Matthew J. Totin, Mohamad El-Batal, Darshana H. Mehta
  • Patent number: 11893258
    Abstract: A method disclosed herein includes storing a data heat map in local cache of a non-volatile memory express (NVME) controller associated with an NVME device, configuring an asynchronous event notification command in a submission queue associated with the NVME device, generating a request for data migration notification to host based on the data heat map, and communicating the data migration notification to a host using the asynchronous event notification command.
    Type: Grant
    Filed: May 3, 2022
    Date of Patent: February 6, 2024
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Nitin Kabra, Sneha Wagh
  • Patent number: 11893268
    Abstract: A method includes calculating, by a data storage device processor, at least one access trajectory from a first disc surface location to at least one second disc surface location at which at least one primary data access operation is to be carried out. The method also includes determining, by the data storage device controller, whether an opportunity to commence at least one secondary data access operation exists along or proximate to the at least one access trajectory from the first disc surface location to the at least one second disc surface location.
    Type: Grant
    Filed: January 19, 2022
    Date of Patent: February 6, 2024
    Assignee: Seagate Technology LLC
    Inventors: Brian T. Edgar, Mark A. Gaertner
  • Patent number: 11886732
    Abstract: A data storage server may store a data packet generated by a client in a first server memory prior to the data packet being migrated to a third server memory of the data storage server by a server controller in response to a server data migration module. The data packet may be moved to satisfy a quality of service agreement between a host and the client. The data packet can be proactively copied to a second server memory by the server controller in response to the migration of the data packet from the first to the third server memories.
    Type: Grant
    Filed: January 31, 2017
    Date of Patent: January 30, 2024
    Assignee: Seagate Technology LLC
    Inventors: Paul F. Kusbel, John E. Moon
  • Patent number: 11880568
    Abstract: A dynamically reconfigurable computational storage drive (CSD) that facilitates parallel data management functionality for a plurality of associated memory devices. The CSD includes an FPGA device that is dynamically reconfigurable during operation of the CSD to provide configuration of a storage interface. Specifically, the FPGA device may be dynamically configured to provide one of a plurality of different communication protocols. A physical connector may be remapped to facilitate a communication protocol without reconnecting a memory device or CSD. The CSD may be provided as a rack-mounted device or a storage appliance for dynamic provision of data management functionality to data in a storage system comprising the CSD.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: January 23, 2024
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Rajesh Maruti Bhagwat, Nahoosh Hemchandra Mandlik, Niranjan Anant Pol, Hemantkumar Vitthalrao Mane
  • Patent number: 11882211
    Abstract: A function secret sharing (FSS) scheme that facilitates multiple evaluations of a secret function. The FSS scheme includes a function share based on a secret function and at least one key of a key-homomorphic pseudo random function (PRF). At least one key and a function share are provided to each party in the FSS scheme. In turn, each party may generate an output share comprising a function share output evaluated at a function input and a masking component generated based on the at least one key in relation to the key-homomorphic PRF. In turn, the output shares of each participating party may be combined to evaluate the secret function. The FSS scheme facilitates multiple evaluations of the secret function without leaking information regarding the secret function.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: January 23, 2024
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Foo Yee Yeo, Nolan Miranda, Vipin Singh Sehrawat
  • Patent number: 11881239
    Abstract: A controller extracts a distortion component of a readback signal from a magnetic read head. The distortion component may be found using a finite length Volterra series, for example. The controller estimates a clearance between the read head and a recording medium based on the distortion component. This clearance measurement can be used for closed loop fly-height control of the read head.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: January 23, 2024
    Assignee: Seagate Technology LLC
    Inventors: Walter R. Eppler, Drew M. Mader
  • Patent number: 11875828
    Abstract: A reader of a magnetic recording head includes a sensor stack, a first side shield and a second side shield disposed on opposite sides of the sensor stack in a cross-track dimension, and a bridge. The bridge is configured to align magnetic moments of the first side shield and the second side shield. The bridge is disposed above the sensor stack relative to a media-facing surface of the magnetic recording head and proximate to the first side shield and the second side shield.
    Type: Grant
    Filed: October 13, 2022
    Date of Patent: January 16, 2024
    Assignee: Seagate Technology LLC
    Inventors: Victor B Sapozhnikov, Taras Grigorievich Pokhil, Mohammed Shariat Ullah Patwari
  • Patent number: 11874801
    Abstract: A method includes receiving a piece of data at an upper-layer server of a multi-tiered storage system comprising the upper-layer server and a block server, and determining a signature for the piece of data. A first bloom filter stored on the upper-layer server is a copy of a second bloom filter stored on the block server. The first bloom filter is checked for the signature. When a match is found in the first bloom filter, the piece of data is sent for storage at the block server, and it is verified at the block server whether a match is present for the piece of data. When a match is present, the piece of data is deduplicated. When a match is not present, the piece of data is stored. When a match is not found in the first bloom filter, the piece of data is stored in the block server.
    Type: Grant
    Filed: February 14, 2022
    Date of Patent: January 16, 2024
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: John Michael Bent, Praveen Viraraghavan, Tim Shaffer
  • Patent number: 11875830
    Abstract: A data storage device (DSD) includes a base-deck, a disc above the base-deck, and a shaft extending perpendicular from the base-deck. The DSD also includes a head stack assembly (HSA) including a head gimbal assembly having a load beam and a head at a first end of the HSA. The head interacts with a surface of the disc. The HSA also includes a second end movably mounted on the shaft. The DSD additionally includes an elevator that linearly moves the HSA along the shaft to adjust a distance between the load beam and the surface of the disc in response to receiving a feedback signal associated with the interaction of the head with the surface of the disc. The feedback signal is one of a plurality of feedback signals employed by the elevator to adjust the distance between the load beam and the surface of the disc.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: January 16, 2024
    Assignee: Seagate Technology LLC
    Inventors: Matthew Aaron Carper, Anil J. Reddy, Brett R. Herdendorf, Riyan Alex Mendonsa