Patents Assigned to Semiconductor Energy Laboratory Co., Ltd.
  • Patent number: 11974447
    Abstract: A novel light-emitting device is provided. A light-emitting device with high emission efficiency is provided. A light-emitting device with a long lifetime is provided. A light-emitting device with low driving voltage is provided. The light-emitting device includes an anode, a cathode, and an EL layer between the anode and the cathode. The EL layer includes a hole-injection layer, a light-emitting layer, and an electron-transport layer. The hole-injection layer is positioned between the anode and the light-emitting layer. The electron-transport layer is positioned between the light-emitting layer and the cathode. The hole-injection layer contains a first substance and a second substance. The first substance is an organic compound which has a hole-transport property and a HOMO level higher than or equal to ?5.7 eV and lower than or equal to ?5.4 eV. The second substance exhibits an electron-accepting property with respect to the first substance.
    Type: Grant
    Filed: October 26, 2022
    Date of Patent: April 30, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Seo, Hiromi Seo, Kunihiko Suzuki, Kanta Abe, Yuji Iwaki, Naoaki Hashimoto, Tsunenori Suzuki
  • Patent number: 11974445
    Abstract: A light-emitting element with high emission efficiency. The light-emitting element includes a first organic compound, a second organic compound, and a guest material. The LUMO level of the first organic compound is lower than the LUMO level of the second organic compound. The HOMO level of the first organic compound is lower than the HOMO level of the second organic compound. The HOMO level of the guest material is higher than the HOMO level of the second organic compound. The energy difference between the LUMO level of the guest material and the HOMO level of the guest material is larger than the energy difference between the LUMO level of the first organic compound and the HOMO level of the second organic compound. The guest material has a function of converting triplet excitation energy into light emission. The first organic compound and the second organic compound form an exciplex.
    Type: Grant
    Filed: July 18, 2016
    Date of Patent: April 30, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Seo, Tatsuyoshi Takahashi, Takeyoshi Watabe, Satomi Mitsumori
  • Patent number: 11973198
    Abstract: A semiconductor device capable of detecting a micro-short circuit of a secondary battery is provided. The semiconductor device includes a first source follower, a second source follower, a transistor, a capacitor, and a comparator. A negative electrode potential and a positive electrode potential of the secondary battery are supplied to the semiconductor device, a first potential is input to the first source follower, and a second potential is input to the second source follower. A signal for controlling the conduction state of the transistor is input to a gate of the transistor, and an output potential of the first source follower related to the potential between the positive electrode and the negative electrode of the secondary battery is sampled.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: April 30, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takanori Matsuzaki, Kei Takahashi, Takahiko Ishizu, Yuki Okamoto, Minato Ito
  • Patent number: 11972945
    Abstract: A semiconductor device having favorable electrical characteristics is provided. The semiconductor device is manufactured by a first step of forming a semiconductor layer containing a metal oxide, a second step of forming a first insulating layer, a third step of forming a first conductive film over the first insulating layer, a fourth step of etching part of the first conductive film to form a first conductive layer, thereby forming a first region over the semiconductor layer that overlaps with the first conductive layer and a second region over the semiconductor layer that does not overlap with the first conductive layer, and a fifth step of performing first treatment on the conductive layer. The first treatment is plasma treatment in an atmosphere including a mixed gas of a first gas containing an oxygen element but not containing a hydrogen element, and a second gas containing a hydrogen element but not containing an oxygen element.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: April 30, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kenichi Okazaki, Yukinori Shima
  • Patent number: 11971638
    Abstract: A first transistor, a second transistor, a third transistor, a fourth transistor are provided. In the first transistor, a first terminal is electrically connected to a first wiring; a second terminal is electrically connected to a gate terminal of the second transistor; a gate terminal is electrically connected to a fifth wiring. In the second transistor, a first terminal is electrically connected to a third wiring; a second terminal is electrically connected to a sixth wiring. In the third transistor, a first terminal is electrically connected to a second wiring; a second terminal is electrically connected to the gate terminal of the second transistor; a gate terminal is electrically connected to a fourth wiring. In the fourth transistor, a first terminal is electrically connected to the second wiring; a second terminal is electrically connected to the sixth wiring; a gate terminal is connected to the fourth wiring.
    Type: Grant
    Filed: December 3, 2021
    Date of Patent: April 30, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Atsushi Umezaki
  • Patent number: 11972790
    Abstract: The semiconductor device includes a first memory cell, and a second memory cell thereover. The first memory cell includes first and second transistors, and a first capacitor. The second memory cell includes third and fourth transistors, and a second capacitor. A gate of the first transistor is electrically connected to one of a source and a drain of the second transistor and the first capacitor. A gate of the third transistor is electrically connected to one of a source and a drain of the fourth transistor and the second capacitor. One of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the third transistor. The second and fourth transistors include an oxide semiconductor. A channel length direction of the first and third transistors is substantially perpendicular to a channel length direction of the second and fourth transistors.
    Type: Grant
    Filed: May 27, 2022
    Date of Patent: April 30, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tomoaki Atsumi, Junpei Sugao
  • Patent number: 11973180
    Abstract: A battery capable of changing its form safely is provided. A bendable battery having a larger thickness is provided. A battery with increased capacity is provided. For an exterior body of the battery, a film in the shape of a periodic wave in one direction is used. A space is provided in an area surrounded by the exterior body and between an end portion of the electrode stack that is not fixed and an interior wall of the exterior body. Furthermore, the phases of waves of a pair of portions of the exterior body between which the electrode stack is located are different from each other. In particular, the phases are different from each other by 180 degrees so that wave crest lines overlap with each other and wave trough lines overlap with each other.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: April 30, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Minoru Takahashi, Ryota Tajima
  • Publication number: 20240132439
    Abstract: A highly heat-resistant organic compound with favorable hole-transport properties is provided. The organic compound is represented by General Formula (G1). In General Formula (G1), X represents a sulfur atom or an oxygen atom, and R21 to R25 and R27 to R30 each independently represent any one of hydrogen, halogen, a nitrile group, an alkenyl group, a vinyl group, an alkynyl group, an ethynyl group, a straight-chain alkyl group having 1 to 6 carbon atoms, a cycloalkyl group having 3 to 10 carbon atoms, an alkoxy group having 1 to 6 carbon atoms, an alkylsilyl group having 3 to 10 carbon atoms, an aryl group having 6 to 30 carbon atoms, and a heteroaryl group having 2 to 30 carbon atoms. Ar1 represents an aryl group having 6 to 30 carbon atoms or a heteroaryl group having 2 to 30 carbon atoms. Ar2 is represented by General Formula (G1-1).
    Type: Application
    Filed: September 29, 2023
    Publication date: April 25, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Sachiko Kawakami, Kazuki KAJIYAMA
  • Publication number: 20240136358
    Abstract: Disclosed is a semiconductor device capable of functioning as a memory device. The memory device comprises a plurality of memory cells, and each of the memory cells contains a first transistor and a second transistor. The first transistor is provided over a substrate containing a semiconductor material and has a channel formation region in the substrate. The second transistor has an oxide semiconductor layer. The gate electrode of the first transistor and one of the source and drain electrodes of the second transistor are electrically connected to each other. The extremely low off current of the second transistor allows the data stored in the memory cell to be retained for a significantly long time even in the absence of supply of electric power.
    Type: Application
    Filed: December 13, 2023
    Publication date: April 25, 2024
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Shunpei YAMAZAKI
  • Publication number: 20240136442
    Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with stable electrical characteristics is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, and a first conductive layer. The first insulating layer is provided over the semiconductor layer. The first conductive layer is provided over the first insulating layer. The semiconductor layer includes a first region that overlaps with the first conductive layer and the first insulating layer, a second region that does not overlap with the first conductive layer and overlaps with the first insulating layer, and a third region that overlaps with neither the first conductive layer nor the first insulating layer. The semiconductor layer contains a metal oxide. The second region and the third region contain a first element. The first element is one or more elements selected from boron, phosphorus, aluminum, and magnesium.
    Type: Application
    Filed: October 10, 2023
    Publication date: April 25, 2024
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kenichi OKAZAKI, Masami JINTYOU, Kensuke YOSHIZUMI
  • Patent number: 11967710
    Abstract: As a positive electrode active material of a secondary battery, a lithium-manganese composite oxide containing lithium, manganese, and an element represented by M, and oxygen is used, and the lithium-manganese composite oxide is covered with reduced graphene oxide. An active material layer including the active material, graphene oxide, a conductive additive, and a binder is formed and soaked in alcohol, and then heat treatment is performed, whereby an electrode with reduced graphene oxide is fabricated.
    Type: Grant
    Filed: January 20, 2021
    Date of Patent: April 23, 2024
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Tatsuya Ikenuma
  • Patent number: 11968850
    Abstract: A reliable light-emitting element with low driving voltage is provided. The light-emitting element includes an electron-injection layer between a cathode and a light-emitting layer. The electron-injection layer is a mixed film of a transition metal and an organic compound having an unshared electron pair. An atom of the transition metal and the organic compound form SOMO.
    Type: Grant
    Filed: February 17, 2023
    Date of Patent: April 23, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Nobuharu Ohsawa, Satoshi Seo
  • Patent number: 11967648
    Abstract: The impurity concentration in the oxide semiconductor film is reduced, and a highly reliability can be obtained.
    Type: Grant
    Filed: October 17, 2022
    Date of Patent: April 23, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masahiro Watanabe, Mitsuo Mashiyama, Kenichi Okazaki, Motoki Nakashima, Hideyuki Kishida
  • Patent number: 11968889
    Abstract: A light-emitting element having a long lifetime is provided. A light-emitting element exhibiting high emission efficiency in a high luminance region is provided. A light-emitting element includes a light-emitting layer between a pair of electrodes. The light-emitting layer contains a first organic compound, a second organic compound, and a phosphorescent compound. The first organic compound is represented by a general formula (GO). The molecular weight of the first organic compound is greater than or equal to 500 and less than or equal to 2000. The second organic compound is a compound having an electron-transport property. In the general formula (GO), Ar1 and Ar2 each independently represent a fluorenyl group, a spirofluorenyl group, or a biphenyl group, and Ar3 represents a substituent including a carbazole skeleton.
    Type: Grant
    Filed: June 11, 2021
    Date of Patent: April 23, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takao Hamada, Hiromi Seo, Kanta Abe, Kyoko Takeda, Satoshi Seo
  • Patent number: 11967598
    Abstract: To suppress fluctuation in the threshold voltage of a transistor, to reduce the number of connections of a display panel and a driver IC, to achieve reduction in power consumption of a display device, and to achieve increase in size and high definition of the display device. A gate electrode of a transistor which easily deteriorates is connected to a wiring to which a high potential is supplied through a first switching transistor and a wiring to which a low potential is supplied through a second switching transistor; a clock signal is input to a gate electrode of the first switching transistor; and an inverted clock signal is input to a gate electrode of the second switching transistor. Thus, the high potential and the low potential are alternately applied to the gate electrode of the transistor which easily deteriorates.
    Type: Grant
    Filed: January 14, 2022
    Date of Patent: April 23, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Atsushi Umezaki, Hiroyuki Miyake
  • Patent number: 11967505
    Abstract: A method for manufacturing a sputtering target with which an oxide semiconductor film with a small amount of defects can be formed is provided. Alternatively, an oxide semiconductor film with a small amount of defects is formed. A method for manufacturing a sputtering target is provided, which includes the steps of: forming a polycrystalline In-M-Zn oxide (M represents a metal chosen among aluminum, titanium, gallium, yttrium, zirconium, lanthanum, cesium, neodymium, and hafnium) powder by mixing, sintering, and grinding indium oxide, an oxide of the metal, and zinc oxide; forming a mixture by mixing the polycrystalline In-M-Zn oxide powder and a zinc oxide powder; forming a compact by compacting the mixture; and sintering the compact.
    Type: Grant
    Filed: April 21, 2023
    Date of Patent: April 23, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masashi Tsubuku, Masashi Oota, Yoichi Kurosawa, Noritaka Ishihara
  • Patent number: 11967649
    Abstract: The semiconductor device includes a first conductor and a second conductor; a first insulator to a third insulator; and a first oxide to a third oxide. The first conductor is disposed to be exposed from a top surface of the first insulator. The first oxide is disposed over the first insulator and the first conductor. A first opening reaching the first conductor is provided in the first oxide. The second oxide is disposed over the first oxide. The second oxide comprises a first region, a second region, and a third region positioned between the first region and the second region. The third oxide is disposed over the second oxide. The second insulator is disposed over the third oxide. The second conductor is disposed over the second insulator. The third insulator is disposed to cover the first region and the second region and to be in contact with the top surface of the first insulator.
    Type: Grant
    Filed: August 25, 2022
    Date of Patent: April 23, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshihiko Takeuchi, Naoto Yamade, Yutaka Okazaki, Sachiaki Tezuka, Shunpei Yamazaki
  • Patent number: 11967831
    Abstract: A novel semiconductor device or a semiconductor device capable of preventing overcharging is provided. A power receiving portion has a function of generating a signal for canceling a wireless signal transmitted from a power feeding portion when the charging is completed. Specifically, when the remaining battery capacity of the power receiving portion is one hundred percent or higher than or equal to a predetermined reference value, the power receiving portion has a function of generating an electromagnetic wave for canceling an electromagnetic wave transmitted from the power feeding portion. Thus, a magnetic field for canceling a magnetic field formed of the electromagnetic wave transmitted from the power feeding portion is formed, so that overcurrent in the power receiving portion can be prevented.
    Type: Grant
    Filed: March 17, 2022
    Date of Patent: April 23, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Takeshi Osada
  • Patent number: 11968820
    Abstract: A novel semiconductor device is provided. The semiconductor device includes a driver circuit and a first transistor layer to a third transistor layer. The first transistor layer includes a first memory cell including a first transistor and a first capacitor. The second transistor layer includes a second memory cell including a second transistor and a second capacitor. The third transistor layer includes a switching circuit and an amplifier circuit. The first transistor is electrically connected to a first local bit line. The second transistor is electrically connected to a second local bit line. The switching circuit has a function of selecting the first local bit line or the second local bit line and electrically connecting the selected local bit line to the amplifier circuit. The first transistor layer to the third transistor layer are provided over the silicon substrate. The third transistor layer is provided between the first transistor layer and the second transistor layer.
    Type: Grant
    Filed: February 11, 2020
    Date of Patent: April 23, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuya Onuki, Yuto Yakubo, Seiya Saito
  • Patent number: 11968863
    Abstract: A display panel is provided. The display panel includes a display region, a functional layer, a first insulating film, and a first conductive film; the display region includes a pixel; the pixel includes a display element and a pixel circuit; the display element includes a first electrode and a second electrode; the second electrode includes a first opening portion; the functional layer includes the pixel circuit, a second opening portion, and an auxiliary wiring; the pixel circuit is electrically connected to the display element in the second opening portion; the auxiliary wiring includes a region overlapping with the first opening portion; the first insulating film includes a third opening portion; the third opening portion includes a region overlapping with the first opening portion; and the first conductive film is electrically connected to the second electrode and the auxiliary wiring in the third opening portion.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: April 23, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hisao Ikeda, Masataka Nakada, Tomoya Aoyama