Patents Assigned to SFE Technologies
  • Patent number: 4741077
    Abstract: A process for providing terminations at the ends of chips for multilayer capacitors such a MLC capacitors includes applying thin films of metallization at the opposite ends of each chip and over the surface of the chip between the ends, and thereafter removing a porton of the thin films of metallization material intermediate the ends, to provide a monolithic multilayer capacitor having proper metallized end terminations. Preferably, the thin films are applied to cover the entire surface of each chip by sputtering thin film material onto a batch of tumbling chips.
    Type: Grant
    Filed: May 15, 1987
    Date of Patent: May 3, 1988
    Assignee: SFE Technologies
    Inventor: Mark Langlois
  • Patent number: 4740863
    Abstract: A small multilayer capacitor, such as an MLC capacitor, has in one of its end terminations a passivation layer surrounded by nested sputter-coated metallization films to provide a safeguarding feature so that the capacitor will not fail short. A process for providing the terminations at the ends of chips for such small MLC capacitors includes applying at least three nested thin films of metallization at the opposite ends of each chip and over the surface of the chip between the ends, and forming the passivation layer before applying the outer nested films, and finally removing a portion of thin films of metallization material intermediate the ends, to provide an MLC capacitor having proper metallized end terminations. Preferably, the thin films are applied to cover the entire surface of each chip by sputtering thin film material onto a batch of tumbling chips.
    Type: Grant
    Filed: May 15, 1987
    Date of Patent: April 26, 1988
    Assignee: SFE Technologies
    Inventor: Marc Langlois
  • Patent number: 4682565
    Abstract: A vacuum vapor depositing system in which a plurality of vapor delivering nozzles fit between, and are guided by, bars supplying inert gas as barrier regions controlling the lateral spread of the vaporized material being deposited.
    Type: Grant
    Filed: January 16, 1986
    Date of Patent: July 28, 1987
    Assignee: SFE Technologies
    Inventor: Philip H. Carrico
  • Patent number: 4647818
    Abstract: Apparatus and method for producing a plurienergetic electron beam source. The apparatus includes a housing which functions as an anode, the same having an electron emission window covered by an electron-transparent grid, a cathode body mounted within the housing and electrically isolated therefrom, the spacing between the cathode body and grid being sufficient to permit a gas discharge to be maintained between them having a plasma region substantially thinner than the cathode sheath region. The method involves the simultaneous feeding of gas between a cathode body and an anode grid, applying voltages of about 10 kV to 20 kV and regulating the gas feed rate and the voltage to maintain a discharge condition of the character described above.
    Type: Grant
    Filed: April 16, 1984
    Date of Patent: March 3, 1987
    Assignee: SFE Technologies
    Inventor: Mooyoung Ham
  • Patent number: 4618911
    Abstract: A monolithic chip capacitor in which the electrode layers are bonded together at an edge. The capacitor includes an electrically conductive substrate that is electrically connected to the bonded edges of the electrode layers. The capacitor body has end terminal surfaces defined by electrically conductive material across one end of the body that is in electrically conducting contact with the substrate. In one form, the termination material is a folded end of the substrate itself. In another form, an end cap which can be thicker than the substrate, is folded to define the termination surface and to provide another surface in good electrical contact with the substrate.
    Type: Grant
    Filed: November 19, 1984
    Date of Patent: October 21, 1986
    Assignee: SFE Technologies
    Inventors: Stanley W. Cichanowski, David G. Shaw
  • Patent number: 4613518
    Abstract: Edge termination of monolithic capacitors having thin electrode layers bonded in dielectric resin is accomplished by ashing away some resin to expose electrode edge surfaces, plating the edge surfaces by vapor deposition, and depositing a conductive layer on the coating by electroless plating, schooping or applying conductive epoxy.
    Type: Grant
    Filed: January 14, 1985
    Date of Patent: September 23, 1986
    Assignee: SFE Technologies
    Inventors: Mooyoung Ham, John W. Duffy
  • Patent number: 4586111
    Abstract: Capacitors comprising at least one electrode pair, the electrodes of the pair, and the electrode pairs, if more than one, being separated by a dielectric member, said dielectric member comprising a polymer of at least one polyacrylate polyether pre-polymer. The capacitor structure may comprise a single dielectric coating separating two electrodes, or it may comprise a plurality of alternating electrode layers and dielectric coatings.
    Type: Grant
    Filed: August 1, 1984
    Date of Patent: April 29, 1986
    Assignee: SFE Technologies
    Inventor: Stanley W. Cichanowski
  • Patent number: 4584628
    Abstract: A miniature monolithic capacitor, and a composite sheet from which such capacitors are cut, in which very thin layers of electrode material are stacked between coatings of dielectric with the electrode layers being substantially thickened through their edge portions so that the termination surfaces of the capacitor includes dielectric and the cross section of the thickened edges, thus facilitating edge termination of the capacitor using conventional techniques.
    Type: Grant
    Filed: June 27, 1984
    Date of Patent: April 22, 1986
    Assignee: SFE Technologies
    Inventor: Stanley W. Cichanowski
  • Patent number: 4538346
    Abstract: A plurality of insulated carrier plates are selectively coated with an electrical conductor. Each plate has a pair of flat mounting faces and a plurality of edge faces between the mounting faces. The edge faces include a plurality of spaced-apart, flat, coplanar protrusions projecting from the remainder of the edge faces. One of the mounting faces of each plate is coated with a plurality of mutually isolated first conductive layers, which extend to the respective protrusions. The other mounting face of each plate is coated with a plurality of mutually isolated second conductive layers, which extend to the respective protrusions. The plates are stacked face-to-face so the respective protrusions of adjacent plates adjoin. A conductive layer is then applied to the adjoining protrusions of the stacked plates to the exclusion of the remainder of the edge faces so as to interconnect electrically the respective first and second conductive layers.
    Type: Grant
    Filed: May 29, 1984
    Date of Patent: September 3, 1985
    Assignee: SFE Technologies, Inc.
    Inventor: William D. Street
  • Patent number: 4516092
    Abstract: A leadless filter component for printed circuits comprises a monolithic ceramic capacitor chip having a ceramic nonconductive outer surface and at least two conductor terminals formed on said outer surface. An inductance including a bobbin and a conductor wound on the bobbin has the bobbin secured to the outer surface of the capacitor chip with the two ends of the conductor being electrically secured to said terminals to form a component having inductive and capacitive reactance.
    Type: Grant
    Filed: February 18, 1983
    Date of Patent: May 7, 1985
    Assignee: SFE Technologies
    Inventor: Michael A. Rosenberg
  • Patent number: 4431937
    Abstract: An improved construction for piezoelectric crystal assemblies has significant advantages both from the standpoint of operational attributes of the finished product and of adaptability to being mass produced in an expeditous and economical manner. A related, improved method of making piezoelectric crystal assemblies, including those of the aforementioned improved construction, is also provided, which similarly has significant advantages from the standpoints of speed and economy.
    Type: Grant
    Filed: October 26, 1981
    Date of Patent: February 14, 1984
    Assignee: SFE Technologies
    Inventor: Maurice Y. White