Patents Assigned to Sharp Kabushiki Kaisha
  • Patent number: 11930485
    Abstract: A user equipment, including: receiving circuitry and transmitting circuitry. The receiving circuitry configured to receive a first radio resource control (RRC) message including first information used for a physical uplink shared channel (PUSCH) transmission corresponding to a configured grant, and a second RRC message comprising second information used for a PUSCH transmission scheduled by a physical downlink control channel (PDCCH) with cyclic redundancy check (CRC) scrambled by a cell-radio network temporary identifier (C-RNTI). The first information including first parameters and a second parameter, and the second information including a third parameter. The transmitting circuitry configured to perform a PUSCH initial transmission corresponding to the configured grant by using the first parameters and the second parameter, and perform, based on detection of a second PDCCH, the PUSCH retransmission corresponding to the configured grant by using the first parameters and the third parameter.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: March 12, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Kai Ying, Tatsushi Aiba, John Michael Kowalski
  • Patent number: 11928989
    Abstract: A rollable display device includes a flexible display panel, a storage unit provided at one end side of the flexible display panel, a support bar provided at the other end side of the flexible display panel, a plurality of glass substrates aligned side by side in a direction intersecting a winding direction of the flexible display panel, and a cover layer formed to cover the glass substrates.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: March 12, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Noriko Watanabe
  • Patent number: 11930035
    Abstract: An information processing apparatus detects an unauthorized attack and transmits attack detection information concerning the detected attack to a communication control device. The communication control device selects an attack countermeasure instruction associated with an attack detection content that matches the attack detection information and an attack countermeasure function of the information processing apparatus by using the transmitted attack detection information and the attack countermeasure information stored in advance, decides a countermeasure method to be executed against the attack, and transmits the attack countermeasure instruction information including the decided countermeasure method to the information processing apparatus. The information processing apparatus is characterized to decide the countermeasure method to be executed against the attack from the received attack countermeasure instruction information and to execute the decided countermeasure method against the attack.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: March 12, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Harunobu Mori, Kenji Tanaka
  • Patent number: 11930680
    Abstract: A display device includes a display substrate including a plurality of pixels and including an active area longer than a display region, and a frame region formed to surround the active area, and a cover glass attached to a display surface side of the display substrate. A frame is provided in a periphery of the cover glass, and the frame covers an outer periphery of the active area. The display region is a region where the active area and a region surrounded by the frame of the cover glass overlap each other.
    Type: Grant
    Filed: September 13, 2018
    Date of Patent: March 12, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Takahiro Yamaue
  • Publication number: 20240078000
    Abstract: The content management device includes a content playback time adjacency determiner, a common scroll message setting operation acceptor, and a playback controller. The content playback time adjacency determiner determines whether playback times of a first piece of content and a second piece of content are adjacent. The operation acceptor accepts an operation to set a common scroll message that is the same for the first piece of content and the second piece of content when the playback times of the first piece of content and the second piece of content are determined to be adjacent by the adjacency determiner. The playback controller continuously plays back the common scroll message across the playback time of the first piece of content and the playback time of the second piece of content when the common scroll message is set to the first piece of content and the second piece of content.
    Type: Application
    Filed: August 15, 2023
    Publication date: March 7, 2024
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Yohko SEIKE
  • Patent number: 11924504
    Abstract: A method and a receiver for receiving a recovery file format file from a provider comprising the steps of: (a) receiving a recovery data table including a RecoveryDataTable element; (b) receiving a contentID field of said RecoveryDataTable element describing a type of content identifier provided in a message having a cardinality of 0 . . . N; (c) receiving a svcInetUrl field of said RecoveryDataTable element describing service information; (d) receiving a URLValue field of said svcInetUrl field describing URL to access Internet signaling files for said service information; (e) decoding elements of said file based upon said recovery data table.
    Type: Grant
    Filed: March 15, 2022
    Date of Patent: March 5, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Sachin G. Deshpande
  • Patent number: 11924385
    Abstract: An information processing apparatus includes a controller that executes a job using a destination, and a storage that stores a setting value of the job, as history information. The controller applies the setting value to execution of the job, when the history information of the job in which a destination acquired from a terminal device is a transmission destination is stored in the storage.
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: March 5, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Takahisa Onishi
  • Patent number: 11922877
    Abstract: The present disclosure achieves a display device provided with a pixel circuit that enables both high-frequency drive and low-frequency drive without causing deterioration in display quality. In a pixel circuit (20), a holding capacitor (C1) is provided between a second control node (NA) connected to a data signal line via a write control transistor (T3) and a first control node (NG) connected to a control terminal of a drive transistor (T4). An oxide thin-film transistor (TFT) is employed for each of a first initialization transistor (T1) having a second conductive terminal connected to the first control node (NG) and a threshold voltage compensation transistor (T2) having a first conductive terminal connected to the first control node (NG).
    Type: Grant
    Filed: July 22, 2020
    Date of Patent: March 5, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Fumiyuki Kobayashi
  • Patent number: 11925078
    Abstract: A display device includes the following: a resin substrate; a TFT layer disposed on the resin substrate, the TFT layer having a stack of, in sequence, a base coat film, a semiconductor film, a gate insulating film, a first metal film, an interlayer insulating film, a second metal film, and a flattening film; a light-emitting element disposed on the TFT layer and forming a display region; and a plurality of TFTs disposed in the TFT layer in the display region. The base coat film includes an amorphous silicon film disposed at least all over the display region.
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: March 5, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tokuo Yoshida, Tohru Okabe
  • Publication number: 20240072101
    Abstract: An LED array includes: a substrate having a depressing-projecting structure formed on a surface of the substrate; a planarization layer formed on the depressing-projecting structure; a plurality of micro LED elements each of which is formed on the planarization layer; and a stray light attenuating groove formed between a pair of adjacent micro LED elements among the plurality of micro LED elements, and extending from toward the pair of micro LED elements to toward the depressing-projecting structure at least part way of the planarization layer.
    Type: Application
    Filed: August 5, 2023
    Publication date: February 29, 2024
    Applicants: SHARP KABUSHIKI KAISHA, Meijo University
    Inventors: YOSHIHIRO UETA, Motoaki IWAYA, Yoshinobu SUEHIRO, Yuta IMAIZUMI, Tatsunari SAITO
  • Patent number: 11917858
    Abstract: The display device includes a light-emitting element layer provided with a plurality of light-emitting elements, and a TFT layer that is provided below the light-emitting element layer and includes TFT configured to drive the plurality of light-emitting elements. Further, at least one thermal insulation layer configured to thermally insulate the plurality of light-emitting elements from external heat is provided, and the thermal insulation layer includes a molybdenum-containing complex and a polyphenylene sulfide-based resin.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: February 27, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Masanobu Mizusaki
  • Patent number: 11917110
    Abstract: An image processing apparatus including: a job executor; a storage that stores therein history information related to execution of jobs; and a controller that sets a display priority of the history information based on an operation mode of the job executor when calling up the history information.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: February 27, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Mayuko Yoshida, Kumiko Ogino
  • Patent number: 11917842
    Abstract: A method for manufacturing a light-emitting device includes forming, on a substrate, a first electrode, and forming a quantum dot layer. The forming the quantum dot layer includes performing first application involves applying a first solution on a position overlapping with the substrate; performing first light irradiation involves irradiating with light the position where the first solution is applied, to melt the ligand and vaporize the first solvent; performing second light irradiation involves irradiating the position with light to raise a temperature of the quantum dot; and performing third light irradiation involves irradiating the position with light to cause the first inorganic precursor to epitaxially grow around the first shell so as to form a second shell with which the first shell is coated. In the performing third light irradiation, at least one set of the quantum dots adjacent to each other is connected to each other via the second shell.
    Type: Grant
    Filed: February 20, 2019
    Date of Patent: February 27, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Masumi Kubo
  • Patent number: 11917615
    Abstract: A terminal apparatus includes: a receiver configured to receive a PDCCH including a DCI format including a frequency resource assignment field, and determine that a PDSCH is not scheduled by the DCI format, based at least on a fact that the frequency resource assignment field is set to all ones; and a transmitter configured to transmit a HARQ-ACK codebook on a PUCCH, based at least on the fact that the frequency resource assignment field is set to all ones.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: February 27, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tomoki Yoshimura, Shoichi Suzuki, Toshizo Nogami, Huifa Lin, Wataru Ouchi, Daiichiro Nakashima, Taewoo Lee
  • Patent number: 11917462
    Abstract: A terminal apparatus includes: a processing unit configured to determine, in a case that the terminal apparatus requests re-establishment of an RRC connection, whether or not the terminal apparatus is configured with NGEN-DC, release, in a case that the terminal apparatus is configured with NGEN-DC, an NR secondary cell group, and release, in the release of the NR secondary cell group, an RLC entity for an RLC bearer configured for the NR secondary group.
    Type: Grant
    Filed: November 1, 2019
    Date of Patent: February 27, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Takako Hori, Shohei Yamada, Hidekazu Tsuboi
  • Patent number: 11910671
    Abstract: With respect to a display device having an external compensation function, a monitor time can be shortened without increasing the number of wiring lines. A pixel circuit in an i-th row and a j-th column includes an organic EL element (display element), a writing control transistor, a drive transistor, a monitor control transistor, and a holding capacitor. A control terminal of the drive transistor is connected to a data signal line S(j) in the j-th column via the write control transistor. The monitor control transistor includes a first conduction terminal connected to a second conduction terminal of the drive transistor, and a second conduction terminal connected to a data signal line S(j+1) in a (j+1)-th column.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: February 20, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Keiichi Yamamoto, Kohhei Tanaka, Takayuki Nishiyama
  • Patent number: 11910417
    Abstract: A terminal apparatus of the present invention receives setting of an initial DL BWP by using an RRC message, the setting of the initial DL BWP comprises setting a first parameter and a second parameter of a CORESET #0, a value of an identifier of the CORESET #0 is 0, the first parameter represents the size of the CORESET #0, and the second parameter represents the size of the initial DL BWP. The terminal apparatus of the present invention receives a DCI format that schedules a PDSCH in an active DL BWP, and identifies, based on a field in the DCI format, a resource block set to which the PDSCH is allocated. A value of the field is determined based on the size of the DL BWP, the start resource block, and the number of consecutively allocated resource blocks. The size of the DCI format in a USS is determined based on the size of the CORESET #0, and when the field is applied to the active DL BWP, the size of the DL BWP is the size of the CORESET #0.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: February 20, 2024
    Assignees: SHARP KABUSHIKI KAISHA, FG Innovation Company Limited
    Inventors: Liqing Liu, Shohei Yamada, Hiroki Takahashi, Masayuki Hoshino, Hidekazu Tsuboi
  • Patent number: 11908361
    Abstract: The display device is provided with a degree-of-degradation calculating circuit that determines a degree of degradation representing a level of degradation of a compensation-target circuit element included in each of K pixel circuits which are some or all of a plurality of pixel circuits; a variation coefficient calculating circuit that calculates, as a variation coefficient, a value depending on a deviation determined based on degrees of degradation of the K pixel circuits; a reference luminance setting circuit that sets, based on the variation coefficient, reference luminance for determining display luminance of each display element after degradation compensation; and a compensation computing circuit that compensates for degradation of the compensation-target circuit elements by correcting input video signals based on the reference luminance and the degree of degradation of each of the K pixel circuits, upon generating video signals to be supplied to the plurality of pixel circuits.
    Type: Grant
    Filed: October 8, 2020
    Date of Patent: February 20, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Hiroyuki Furukawa, Chie Toridono, Masafumi Ueno
  • Patent number: 11908408
    Abstract: Provided is a display device with pixel circuits, each including first compensation transistor connected to a control terminal of a drive transistor at one conductive terminal, an intermediate node at another conductive terminal, and a scanning line at a control terminal, a second compensation transistor connected to the intermediate node at one conductive terminal, a conductive terminal of the drive transistor at another conductive terminal, and the scanning line at a control terminal, and a capacitor connected to the intermediate node at one electrode and a control line at another electrode. The driver circuit changes a potential of the scanning line from on to off level and also changes a potential of the control line from a second level to a first level, in an opposite direction to the change in the potential thereof.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: February 20, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Tomoo Furukawa
  • Patent number: 11909936
    Abstract: An image forming apparatus records identification information of an external memory and identification information of a scan job as a log when the external memory is attached to start the scan job. When the external memory is removed in the middle of the scan job, scan data is temporarily saved together with the identification information of the job. When the removed external memory is attached, for example, in a ready state, log data is referred to determine whether the external memory is that removed in the middle of the job and whether the scan data associated with the external memory is saved. When it is determined that the scan data is saved, the scan data is saved in the external memory.
    Type: Grant
    Filed: March 3, 2023
    Date of Patent: February 20, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Hiroyuki Ishikura