Abstract: Provided is a semiconductor device in which a snubber-circuit is incorporated and can realize downsizing of a power conversion circuit into which the semiconductor device is assembled, and is flexibly applicable to various electric equipment. A semiconductor device includes a semiconductor substrate, a source electrode, a drain electrode, a plurality of trenches, a plurality of first electrodes disposed in a plurality of trenches by way of gate insulation films formed on side walls of the plurality of respective trenches, a plurality of second electrodes disposed above the plurality of first electrodes in a state where the second electrodes are spaced apart from the first electrodes, a plurality of first insulation regions, and a plurality of second insulation regions. The trenches, the first electrodes and the second electrodes are formed in stripes as viewed in a plan view. At least one of the plurality of second electrodes is connected to the drain electrode.

Abstract: An electronic device has a primary coil 10; a secondary coil 20 disposed to face the primary coil 10; a primary-side electronic element 110 electrically connected to the primary coil 10; and a secondary-side electronic element 210 electrically connected to the secondary coil 20. The primary coil 10 has a primary-side first coil 10a that is provided on another side of the secondary coil 20, and a primary-side second coil 10b that is provided on one side of the primary-side first coil 10a. A connecting part 19 connecting the primary-side first coil 10a and the primary-side second coil 10b is provided and passes through a space of the secondary coil 20.

Abstract: A semiconductor device according to the present invention includes: a circuit board; a semiconductor element having a main electrode; a metal frame; and a metal plate having a flat plate shape, the metal plate being disposed between the metal frame and the main electrode, wherein the metal plate and a conductive bonding material, form a stress relaxation structure which relaxes a stress applied to metal plate and the conductive bonding material, disposed between the metal frame and the semiconductor element, and the stress relaxation structure is configured such that a thickness of the metal plate is smaller than a thickness of the metal frame, and at least one convex portion is formed on the metal plate at a position which corresponds to the main electrode. The semiconductor device according to the present invention can relax a stress applied to a conductive bonding material between a semiconductor element and a metal frame even when a relatively thick metal frame is used.

Abstract: A MOSFET includes: a semiconductor base substrate having an n-type column region and a p-type column region, the n-type column region and the p-type column region forming a super junction structure; and a gate electrode formed by way of a gate insulation film. Assuming a region of the semiconductor base substrate which provides a main operation of the MOSFET as an active region, a region of the semiconductor base substrate maintaining a withstand voltage of the MOSFET as an outer peripheral region, and a region of the semiconductor base substrate disposed between the active region and the outer peripheral region as an active connecting region, out of the active region, the active connecting region, and the outer peripheral region of the semiconductor base substrate, the crystal defects are formed only in the active region and the active connecting region.

Abstract: An electronic device includes: a substrate at which an electronic component is mounted; and a resin case configured to accommodate the substrate internally, in which: the case has an attachment portion configured to attach the case to a flat plate-shaped fixing portion of a fixture target by the fixing portion being inserted into the attachment portion and the attachment portion engaging with the fixing portion; the attachment portion has a first pressing portion having a convex portion that is inserted into a concave portion of the inserted fixing portion, and a pair of second pressing portions that hold between them respective side faces of the inserted fixing portion; and leading end sides of the pair of second pressing portions abut on the inserted fixing portion and are resiliently deformed in directions away from each other, holding between them the respective side faces of the fixing portion in a state in which the leading end sides have been resiliently deformed.

Abstract: A semiconductor device includes: an inner substrate on which a semiconductor chip is mounted, and has a surface on which terminals including electric path terminals are formed; a lead frame which has a chip connecting electrode portion which is electrically connected to a surface of the semiconductor chip via a conductive bonding member, substrate connecting electrode portions which are electrically connected to the electric path terminals of the inner substrate, and horizontal surface support portions which bulge to the outside from the chip connecting electrode portion or the substrate connecting electrode portions; and pin terminals which are mounted upright over the inner substrate in a direction perpendicular to flat surfaces of the substrate connecting electrode portions of the lead frame, wherein the horizontal surface support portions bulge to the outside of the inner substrate.

Abstract: An electronic module has a first substrate 11; a first electronic element 13 provided on one side of the first substrate 11; a first connection body 60 provided on the one side of the first electronic element 13; a second electronic element 23 provided on the one side of the first connection body 60; and a second connection body 70 provided on the one side of the second electronic element 23. The first electronic element 13 and the second electronic element 23 do not overlap in a plane direction.

Abstract: A wide gap semiconductor device has a wide gap semiconductor layer 10; and a metal electrode 20 disposed on the wide gap semiconductor layer 10. The metal electrode 20 has a monocrystalline layer 21 having a hexagonal close-packed (HCP) structure in an interface region between the metal electrode 20 and the wide gap semiconductor layer 10. The monocrystalline layer 21 has a specific element-containing region 22 containing O, S, P or Se.

Abstract: A semiconductor device is provided, including a seal portion; an electronic element within the seal portion; first, second, and third lead terminals; first and second connecting elements; and first and second conductive bonding agents, one end of the first connecting element having a protrusion downward and electrically connected to a control electrode of the electronic element with the first conductive bonding agent, a first side surface extending from the one end to the other end of the first connecting element is parallel to an extending direction along which the one end of the second connecting element extends, a wall portion being disposed on a top surface of the one end of the second lead terminal, and the wall portion being in contact with the other end of the first connecting element.

Abstract: An electronic module has a first substrate 11, a first electronic element 13, a second electronic element 23, a second substrate 21, a first terminal part 110 provided on a side of the first substrate 11 and a second terminal part 120 provided on a side of the second substrate 21. The first terminal part 110 has a first surface direction extending part 114 and a first normal direction extending part 113 extending toward one side or the other side. The second terminal part 120 has a second surface direction extending part 124 and a second normal direction extending part 123 extending toward one side or the other side. The second surface direction extending part 124 is provided on one side of the first surface direction extending part 114, and the first surface direction extending part 114 and the second surface direction extending part 124 overlap one another in a surface direction.

Abstract: A semiconductor device includes: a semiconductor base substrate including a semiconductor layer; a first main electrode; a second main electrode; a plurality of peripheral trenches formed on a surface of the semiconductor layer and having bottom portions covered by the semiconductor layer in a peripheral region; and a plurality of in-trench electrodes each embedded in each of the plurality of peripheral trenches byway of an insulation layer formed on an inner surface of the each peripheral trench, wherein the semiconductor base substrate further includes, in the peripheral region, a plurality of second conductive type floating regions disposed in the semiconductor layer at a depth position deeper than the bottom portions of the peripheral trenches in a spaced apart manner from the peripheral trenches and having a potential in a floating state.

Abstract: A wide gap semiconductor device has: a wide gap semiconductor layer; and a metal layer 20 provided on the wide gap semiconductor layer. The metal layer 20 has a single crystal layer 21 in an interface region at an interface with the wide gap semiconductor layer. When it is assumed that a lattice constant, in an equilibrium state, of a metal constituting the metal layer 20 is L, the single crystal layer 21 in the interface region includes a first region in which a lattice constant L1 is smaller than L by 1.5% to 8%.

Abstract: A semiconductor device including a substrate; a chip on which a surface electrode is formed; and a lead. The lead includes a first electrode connecting portion disposed on the surface electrode and electrically connected to the surface electrode of the chip via a conductive bonding material; a second electrode connecting portion electrically connected to an electrode portion of a wiring pattern. A lead connected to the first electrode connecting portion and the second electrode connecting portion. The lead further has a thermal shrinking stress equalizing structure on a portion of an outer periphery of the first electrode connecting portion. The lead is configured to make a thermal shrinking stress applied to a conductive bonding material between the first electrode connecting portion and the surface electrode equal.

Abstract: A semiconductor device includes: plural conductor portions formed on an insulating substrate; a semiconductor element disposed on one of the plural conductor portions on the insulating substrate; a support member that is disposed at a predetermined distance from one of the plural conductor portions on the insulating substrate; a columnar pin terminal that is supported by the support member and is connected to the one of the plural conductor portions on the insulating substrate from which the support member is disposed at the predetermined distance; and a sealing resin that seals the insulating substrate, the plural conductor portions, the semiconductor element, and the support member. The support member has a through-hole having a polygonal shape and penetrating in a plate thickness direction of the support member, and the pin terminal is supported by the support member in a state in which the pin terminal is inserted through the through-hole.

Abstract: A semiconductor device includes: an insulating substrate; a first conductor portion and a second conductor portion that are formed on the insulating substrate; a semiconductor element disposed on the first conductor portion; a first terminal having a flat plate-shape that is connected to a first electrode of the semiconductor element; a second terminal having a flat plate-shape that is connected to the first conductor portion; and a sealing resin that seals the insulating substrate, the first conductor portion, the second conductor portion, and the semiconductor element. Each of the first terminal and the second terminal includes: an inner terminal portion disposed inside the sealing resin; and an outer terminal portion disposed in a state of being exposed to an exterior of the sealing resin, and a female thread portion is provided in the outer terminal portion of each of the first terminal and the second terminal.

Abstract: A terminal member connected to a connection target portion includes: a bent portion bent toward the connection target portion; and a tip connection portion provided at a tip part of the bent portion, in which the tip connection portion is connected to the connection target portion via a conductive bonding material.

Abstract: A semiconductor device includes: an insulating substrate; a first conductor portion and a second conductor portion that are formed on the insulating substrate; a semiconductor element disposed on the first conductor portion; a first terminal that is connected to a first electrode of the semiconductor element; a second terminal that is connected to the first conductor portion; a connection member electrically connecting a control electrode of the semiconductor element and the second conductor portion to each other; a support member that is disposed at a predetermined distance from the second conductor portion; a pin terminal having that is supported in a state of being inserted through the support member and connected to the second conductor portion; and a sealing resin that seals the insulating substrate, the first conductor portion, the second conductor portion, the semiconductor element, the connection member, and the support member.