Abstract: A coding method intended to increase the error correction performance without greatly increasing the size of an error correction circuit, the method, as illustrated in FIG. 1A, includes the steps of dividing data constituting one page and yet to be coded into data blocks including a first data block located on one end of the one page to a fourth data block located on the other end of the one page; generating a first error correcting code by coding the first data block; generating a second error correcting code by coding a second data block and a part of the first data block in combination; generating a third error correcting code by coding a third data block and a part of the second data block in combination; and generating a fourth error correcting code by coding a fourth data block and a part of the third data block in combination.

Abstract: A coding method intended to increase the error correction performance without greatly increasing the size of an error correction circuit, the method, as illustrated in FIG. 1A, includes the steps of dividing data constituting one page and yet to be coded into data blocks including a first data block located on one end of the one page to a fourth data block located on the other end of the one page; generating a first error correcting code by coding the first data block; generating a second error correcting code by coding a second data block and a part of the first data block in combination; generating a third error correcting code by coding a third data block and a part of the second data block in combination; and generating a fourth error correcting code by coding a fourth data block and a part of the third data block in combination.

Abstract: An error correction unit is an area in a page where the error bit count is low, and an error correction unit is an area in a page where the error bit count is high. The error correction unit includes a user data area, a first redundancy area, and a second redundancy area. The error correction unit includes a user data area, a first redundancy area, and a second redundancy area. Errors in the user data areas are corrected with a first set of redundant bits stored in the first redundancy areas, respectively. A second set of redundant bits for correcting errors in the user data area within the high-error bit count page is stored in the second redundancy area within the low-error bit count page and the second redundancy area within the high-error bit count page in a distributed manner.