Abstract: Each realization of an electric circuit design defines a frequency response. For a test lot of the design, frequency responses are measured, each at a stable value of an environment parameter, wherein the totality of the values are distributed over a parameter range. Based on the measurements, a design-specific model is defined that describes a frequency response of the design in dependence of the environment parameter. For a unit in a main lot of realizations of the design, a unit-specific frequency response is measured at a stable value of the environment parameter; the model is fitted to the response, whereby a unit-specific model is obtained; data representing the unit-specific model is stored in association with the unit; and the unit is operated in conjunction with a compensation stage configured to determine a present value of the environment parameter and compensate drift in relation to a parameter-independent reference frequency response.

Abstract: A method and device for handling an in-phase and quadrature (“I/Q”) channel mismatch of an I/Q down-converted signal, and a use of the device. A discrete-time complex valued signal r(n) based on an analog-to-digital conversion of the I/Q down-converted signal is obtained. The obtained discrete-time complex valued signal r(n) is oversampled by a factor of two or more. An intermediate signal v(n) is formed from the discrete-time complex valued signal r(n). The intermediate signal v(n) corresponds to the real part of a ?/2 frequency shifted version of the obtained discrete-time complex valued signal r(n). A procedure for obtaining an estimate of a frequency dependent mismatch of a two-channel time-interleaved analog-to-digital converter (“TI-ADC”) is applied on the formed intermediate signal v(n). Thereby a TI-ADC mismatch estimate is obtained. The I/Q channel mismatch is estimated and/or compensated based on the obtained TI-ADC mismatch estimate.

Abstract: A method and device for handling an in-phase and quadrature (“I/Q”) channel mismatch of an I/Q down-converted signal, and a use of the device. A discrete-time complex valued signal r(n) based on an analog-to-digital conversion of the I/Q down-converted signal is obtained. The obtained discrete-time complex valued signal r(n) is oversampled by a factor of two or more. An intermediate signal v(n) is formed from the discrete-time complex valued signal r(n). The intermediate signal v(n) corresponds to the real part of a ?/2 frequency shifted version of the obtained discrete-time complex valued signal r(n). A procedure for obtaining an estimate of a frequency dependent mismatch of a two-channel time-interleaved analog-to-digital converter (“TI-ADC”) is applied on the formed intermediate signal v(n). Thereby a TI-ADC mismatch estimate is obtained. The I/Q channel mismatch is estimated and/or compensated based on the obtained TI-ADC mismatch estimate.

Abstract: An estimation unit for estimating a nonlinearity error of a conversion circuit, such as an ADC, is adapted to receive a continuous-time input signal and output a digital output signal. In at least one embodiment, the continuous-time input signal is essentially bandlimited to an angular frequency band [?1, ?2], where ?1>(L?1)?/T, ?2<L?/T, L is a positive integer, and T is a sample period of the conversion circuit. The estimation unit includes an input port for receiving a digital input signal having a first sample rate 1/T and an output port for outputting a digital estimated error signal also having the first sample rate.

Abstract: Methods for compensation of imbalance between I (In-phase) and Q (Quadrature) signal paths (12a, 12b, 605a, 605b) in a quadrature receiver (8) and a quadrature transmitter (600) are disclosed. In the receiver case, the imbalance is compensated for by means of post-distortion in the digital domain. In the transmitter case, the imbalance is compensated for by means of pre-distortion in the digital domain. The methods can be carried out with a relatively low computational complexity. Signal-processing devices (30, 610) for carrying out the methods are disclosed as well. The same basic internal structure may be used for the signal-processing device (30) in the receiver case as for the signal processing device (610) in the transmitter case.

Abstract: A processing device (60) for a radio-receiver circuit (20) is disclosed. The radio-receiver circuit comprises an input terminal (22) for receiving an analog input signal, circuitry (50) for generating a compensated analog input signal by subtracting an analog compensation signal from the analog input signal, an analog-to-digital converter (30) arranged to receive the compensated analog input signal on an input terminal of the analog-to-digital converter (30), and circuitry (40, 110) for to generating the analog compensation signal based on a digital compensation signal. The processing device (60) comprises: an input terminal (62) for receiving an output signal of the analog-to-digital converter (30); and an output terminal (64) for supplying the digital compensation signal.

Abstract: A device (10) for generating a digital output signal by digitizing an analog input signal is disclosed. The device (10) comprises a first signal path comprising a first ADC (20a) arranged to convert a first component of the analog input signal, residing in a first frequency band (40), to a first digital signal, and a second signal path comprising a second ADC (20b) arranged to convert a second component of the analog input signal, residing in a second frequency band (50), to a second digital signal. The first and the second frequency band (40, 50) overlap, such that there is a common frequency sub band (60), which is comprised in both the first and the second frequency band (40, 50). The device (10) comprises a combination unit (30).

Abstract: A method and a module for estimating a plurality of relative channel-error for at least one signal with respect to a reference signal. The signals and are produced by an analog-to-digital module including parallel and time interleaved analog-to-digital converters and are received by an estimation module. The method is performed by the estimation module and includes defining a function representing a relationship between the reference signal and an arbitrary signal in the group of signals, selecting a first reference signal in the group of signals, selecting a second signal from the remaining signals in the group, optimizing the function so as to obtain an estimate of the plurality of relative channel-error, and repeating the selecting a second signal and optimizing the function for each remaining signal.

Abstract: An estimation unit for estimating a nonlinearity error of a conversion circuit, such as an ADC, is adapted to receive a continuous-time input signal and output a digital output signal. In at least one embodiment, the continuous-time input signal is essentially bandlimited to an angular frequency band [?1, ?2], where ?1>(L?1)?/T, ?2<L?/T, L is a positive integer, and T is a sample period of the conversion circuit. The estimation unit includes an input port for receiving a digital input signal having a first sample rate 1/T and an output port for outputting a digital estimated error signal also having the first sample rate.

Abstract: A method for the compensation of frequency-response mismatch errors in M-channel time-interleaved ADCs. The compensation is done through an M-periodic time-varying filter hn(k)=hn mod M(k) (2), or, equivalently, a set of M time-invariant filters hn(k), n=0, 1, . . . , M?1. The overall compensation system is constructed by determining the M filter impulse responses hn(k) through M separate matrix inversions, where the size of the matrices equals the filter impulse response length. Also, a compensated M-channel time-interleaved ADC based on and performing the method.

Abstract: A method for the compensation of frequency-response mismatch errors in M-channel time-interleaved ADCs. The compensation is done utilizing a technique that makes use of a number of fixed filters, that approximate differentiators of different orders, and a few variable multipliers that directly correspond to parameters in polynomial models of the M channel frequency responses. A compensated M-channel time-interleaved ADC is based on and can perform the method.

Abstract: A method for the compensation of frequency-response mismatch errors in M-channel time-interleaved ADCs. The compensation is done utilizing a technique that makes use of a number of fixed filters, that approximate differentiators of different orders, and a few variable multipliers that directly correspond to parameters in polynomial models of the M channel frequency responses. A compensated M-channel time-interleaved ADC is based on and can perform the method.

Abstract: A method for the compensation of frequency-response mismatch errors in M-channel time-interleaved ADCs. The compensation is done through an M-periodic time-varying filter hn(k)=hn mod M(k) (2), or, equivalently, a set of M time-invariant filters hn(k), n=0, 1, . . . , M?1. The overall compensation system is constructed by determining the M filter impulse responses hn(k) through M separate matrix inversions, where the size of the matrices equals the filter impulse response length. Also, a compensated M-channel time-interleaved ADC based on and performing the method.

Abstract: A method for estimating a relative time difference vector in a group of digitized signals from a time interleaved analog-to-digital module having a plurality of parallel and time interleaved analog-to-digital converters. The method comprises the steps of selecting (S1) one of said digitized signals as a reference signal, calculating (S2-S3) an actual time delay between each of the remaining signals and said reference signal, and subtracting (S4), for each of said remaining signals, an intended interleaving time delay from said time delay. In order for this method to provide the correct estimate, the signal must be bandlimited, not only to the system bandwidth, but to the bandwidth of one ADC. However, given this bandwidth limitation, the estimation is very precise, and therefore enables reconstruction of the digitized signal without feedback.

Abstract: A method and a module for estimating a plurality of relative channel-error for at least one signal with respect to a reference signal. The signals and are produced by an analog-to-digital module including parallel and time interleaved analog-to-digital converters and are received by an estimation module. The method is performed by the estimation module and includes defining a function representing a relationship between the reference signal and an arbitrary signal in the group of signals, selecting a first reference signal in the group of signals, selecting a second signal from the remaining signals in the group, optimizing the function so as to obtain an estimate of the plurality of relative channel-error, and repeating the selecting a second signal and optimizing the function for each remaining signal.