Abstract: Systems and methods for detecting and protecting against phase manipulation during AoA or AoD operations are disclosed. For AoA operations, the network device receiving the constant tone extension (CTE) generates an antenna switching pattern, which may be randomly generated. The network device then receives the CTE using a plurality of antenna elements. In one embodiment, the network device compares the phase of portions of the CTE signal received that utilize the same antenna element. If the phase of these portions differs by more than a threshold, the network device detects a malicious attack and acts accordingly. In another embodiment, if the AoA algorithm cannot determine the angle of arrival, the network device detects a malicious attack and acts accordingly. For angle of departure operations, the network device that transmits the CTE signal generates the antenna switching pattern and transmits it to the position engine, which performs the comparisons described above.

Abstract: A receiver concurrently demodulates data transmitted with a plurality of protocols. The receiver utilizes multiple and simultaneous protocol detections at preamble and/or packet payload phases. To provide robust detection and achieve fewer false detections, the receiver extends the cross correlation length once a short cross-correlation is valid. The receiver includes a first demodulator path and a second demodulator path with different filter bandwidths. The second demodulator path includes a decimator that reduces data by two. A correlator bank is coupled to the first and second demodulator paths and concurrently detects preamble symbols associated with a plurality of protocols. A first noise detector is coupled to the first demodulator path and a second noise detector is coupled to the second demodulator path. A first symbol identifier circuit is coupled to the first demodulator path and a second symbol identifier circuit coupled to the second demodulator path to provide packet payload symbol detection.

Abstract: An apparatus includes a sample-and-hold (S/H) circuit. The S/H circuit includes a first switch coupled to provide an input signal to be sampled, and a second switch coupled to the first switch and to a first capacitor. The S/H circuit further includes a third switch coupled to the second switch and to a second capacitor, and a fourth switch to selectively couple to ground a node between the first and second switches.

Abstract: An apparatus includes a radio frequency (RF) circuit to transmit or receive RF signals. The apparatus further includes a loop antenna to transmit or receive the RF signals. The apparatus further includes an impedance matching circuit coupled to the RF circuit and to the loop antenna. The impedance matching circuit includes lumped reactive components.

Abstract: An interface between two devices is disclosed. To consume power, the signals used in the interface utilize CMOS signalling. Further, to achieve high speed, a reduced frequency clock is transmitted from one device to the second device. The second device has a clock multiplier to recreate the original clock. Both devices utilize a clock phase alignment block which aligns the phase of the clock with the incoming data. The clock phase alignment block utilizes a digital PLL to consume power. Further, since the digital PLL retains its state, the reduced frequency clock may be disabled when data is not being transmitted. This interface may be used to transmit serial data at rates up to and exceeding 2.5 Gbits/sec.

Abstract: A system and method for one-way ranging is disclosed. The system comprises a transmitter, also referred to as a tag, transmitting a first frequency in a first frequency group. The receiver, also referred to as the locator, receives the first frequency and measures the phase at a first point in time. At a later time, the transmitter switches to a second frequency, which is close in frequency to the first frequency so as to also be part of the first frequency group. The receiver also switches to the second frequency. The receiver then measures the phase of the second frequency at a second point in time. The transmitter and receiver then repeat this sequence for a second frequency group. The four phase measurements are used to determine the distance from the transmitter to the receiver. In this way, improved accuracy may be achieved by having a large separation between the first frequency group and the second frequency group.

Abstract: An apparatus includes a radio-frequency (RF) receiver for receiving an RF signal using a plurality of antennas. The RF receiver includes a demodulator to provide a switch signal to cause the RF receiver to use an antenna in the plurality of antennas. The RF receiver further includes a carrier frequency offset (CFO) correction circuit that uses an estimation of the carrier frequency offset and an estimation of phase differences to remove the carrier frequency offset.

Abstract: An apparatus includes a comparator. The comparator includes first and second pregain stages, and a switch network coupled to the first and second pregain stages. A plurality of switches in the switch network are operable to provide a feedback path around at least one of the first and second pregain stages. The comparator further includes a latch coupled to the second pregain stage.

Abstract: An apparatus includes a substrate and a loop antenna formed using the substrate. The loop antenna includes a set of gaps formed to isolate a first part of the loop antenna from a second part of the loop antenna.

Abstract: An apparatus includes a module. The module includes a radio frequency (RF) circuit to transmit or receive RF signals, and a loop antenna to transmit or receive the RF signals. The module further comprises an impedance matching circuit coupled to the RF circuit and to the loop antenna. The impedance matching circuit comprises lumped reactive components.

Abstract: A communications processor is operative in a plurality of modes including at least a high performance mode, a power savings mode with lower computational capability, and a shutdown mode with a wakeup capability. A memory for the communications processor has a high speed segment and a low speed segment, the high speed segment and low speed segment respectively on a high speed data bus and a low speed data bus, the high speed data bus and low speed data bus coupled by a bidirectional bridge.

Abstract: An apparatus includes a module, which includes an impedance matching circuit. The apparatus further includes a capacitor that is external to the module, and is coupled to the impedance matching circuit. The apparatus further includes a loop antenna to transmit or receive the RF signals. The loop antenna is coupled to the capacitor.

Abstract: An apparatus includes a radio frequency (RF) circuit to transmit or receive RF signals. The apparatus further includes a loop antenna to transmit or receive the RF signals. The apparatus further includes an impedance matching circuit coupled to the RF circuit and to the loop antenna. The impedance matching circuit includes lumped reactive components.

Abstract: An apparatus includes a radio frequency (RF) circuit to transmit or receive RF signals. The apparatus further includes a loop antenna to transmit or receive the RF signals. The apparatus further includes an impedance matching circuit coupled to the RF circuit and to the loop antenna. The impedance matching circuit includes lumped reactive components.

Abstract: A mesh receiver has a wakeup receiver for reception of a wakeup sequence formed by keyed RF or a sequence of wireless packets and gaps, a transmitter forming low speed RF wakeup sequence to other mesh stations, a mesh receiver for reception of high speed WLAN packets, the transmitter sending a wireless ACK packet in response to a wakeup sequence, the mesh receiver thereafter receiving wireless packets from a remote station, the mesh transmitter sending an ACK, the mesh station thereafter identifying a next hop station, and sending a wakeup sequence to that station, after receipt of an ACK, sending the data, the mesh receiver and mesh transmitter thereafter going to sleep.

Abstract: An apparatus includes a module, which includes an impedance matching circuit. The apparatus further includes a capacitor that is external to the module, and is coupled to the impedance matching circuit. The apparatus further includes a loop antenna to transmit or receive the RF signals. The loop antenna is coupled to the capacitor.

Abstract: A radio-frequency (RF) apparatus includes a wideband receive (RX) impedance matching circuit to provide a received differential RF signal to RF receive circuitry. The wideband RX impedance matching circuit includes first and second inductors to receive the differential RF signal. The wideband RX impedance matching circuit further includes a third inductor coupled across an input o the RF receive circuitry. The third inductor performs the functionality of a capacitor having a negative capacitance value.

Abstract: A flip-flop including a scan enable input for receiving a scan enable signal, a clock input for receiving a clock signal, input select circuitry that is configured to select between a data input and a scan input based on a state of the scan enable signal for providing a selected input, latching circuitry that is configured to latch the selected input to a preliminary output node in response to transitions of the clock signal, and output select circuitry that is configured to provide a state of the preliminary output node to a selected one of a scan output and a data output based on a state of the scan enable signal. The flip-flop may be implemented using fast yet leaky transistors. The data output may be disabled to prevent toggling other circuitry when scanning into or out of a memory for data retention.

Abstract: An apparatus includes a radio frequency (RF) receiver to receive packets. The RF receiver includes first and second synchronization field detectors (SFDs). The first and second SFDs detect synchronization headers generated using first and second physical layer (PHY) modes, respectively.

Abstract: In at least one embodiment, a method for measuring a distance between a first communications device including a first local oscillator and a second communications device including a second local oscillator includes unwrapping N phase values to generate N unwrapped phase values. N is an integer greater than one. Each of the N phase values indicate an instantaneous phase of a received signal. The method includes averaging the N unwrapped phase values to generate an average phase value. The method includes wrapping the average phase value to generate a final phase measurement of the first local oscillator with respect to the second local oscillator.