Patents Assigned to Silicon Space Technology Corp.
  • Radiation hardened isolation structures and fabrication methods
    Patent number: 8278719
    Abstract: Semiconductor devices can be fabricated using conventional designs and process but including specialized structures to reduce or eliminate detrimental effects caused by various forms of radiation. Such semiconductor devices can include one or more parasitic isolation devices and/or buried layer structures disclosed in the present application. The introduction of design and/or process steps to accommodate these novel structures is compatible with conventional CMOS fabrication processes, and can therefore be accomplished at relatively low cost and with relative simplicity.
    Type: Grant
    Filed: October 16, 2006
    Date of Patent: October 2, 2012
    Assignee: Silicon Space Technology Corp.
    Inventor: Wesley H. Morris
  • Fabrication methods for radiation hardened isolation structures
    Patent number: 8252642
    Abstract: Semiconductor devices can be fabricated using conventional designs and process but including specialized structures to reduce or eliminate detrimental effects caused by various forms of radiation. Such semiconductor devices can include one or more parasitic isolation devices and/or buried layer structures disclosed in the present application. The introduction of design and/or process steps to accommodate these novel structures is compatible with conventional CMOS fabrication processes, and can therefore be accomplished at relatively low cost and with relative simplicity.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: August 28, 2012
    Assignee: Silicon Space Technology Corp.
    Inventor: Wesley H. Morris
  • Methods for operating and fabricating a semiconductor device having a buried guard ring structure
    Patent number: 8093145
    Abstract: Semiconductor devices can be fabricated using conventional designs and process but including specialized structures to reduce or eliminate detrimental effects caused by various forms of radiation. Such semiconductor devices can include the one or more parasitic isolation devices and/or buried guard ring structures disclosed in the present application. The introduction of design and/or process steps to accommodate these novel structures is compatible with conventional CMOS fabrication processes, and can therefore be accomplished at relatively low cost and with relative simplicity.
    Type: Grant
    Filed: December 3, 2007
    Date of Patent: January 10, 2012
    Assignee: Silicon Space Technology Corp.
    Inventor: Wesley H. Morris
  • Buried guard ring and radiation hardened isolation structures and fabrication methods
    Patent number: 7804138
    Abstract: Semiconductor devices can be fabricated using conventional designs and process but including specialized structures to reduce or eliminate detrimental effects caused by various forms of radiation. Such semiconductor devices can include the one or more parasitic isolation devices and/or buried guard ring structures disclosed in the present application. The introduction of design and/or process steps to accommodate these novel structures is compatible with conventional CMOS fabrication processes, and can therefore be accomplished at relatively low cost and with relative simplicity.
    Type: Grant
    Filed: July 13, 2006
    Date of Patent: September 28, 2010
    Assignee: Silicon Space Technology Corp.
    Inventor: Wesley H. Morris
  • Buried guard ring structures and fabrication methods
    Patent number: 7629654
    Abstract: Semiconductor devices can be fabricated using conventional designs and process but including specialized structures to reduce or eliminate detrimental effects caused by various forms of radiation. Such semiconductor devices can include the one or more parasitic isolation devices and/or buried guard ring structures disclosed in the present application. The introduction of design and/or process steps to accommodate these novel structures is compatible with conventional CMOS fabrication processes, and can therefore be accomplished at relatively low cost and with relative simplicity.
    Type: Grant
    Filed: December 3, 2007
    Date of Patent: December 8, 2009
    Assignee: Silicon Space Technology Corp.
    Inventor: Wesley H. Morris
  • Buried guard ring and radiation hardened isolation structures and fabrication methods
    Patent number: 7304354
    Abstract: Semiconductor devices can be fabricated using conventional designs and process but including specialized structures to reduce or eliminate detrimental effects caused by various forms of radiation. Such semiconductor devices can include the one or more parasitic isolation devices and/or buried guard ring structures disclosed in the present application. The introduction of design and/or process steps to accommodate these novel structures is compatible with conventional CMOS fabrication processes, and can therefore be accomplished at relatively low cost and with relative simplicity.
    Type: Grant
    Filed: September 27, 2004
    Date of Patent: December 4, 2007
    Assignee: Silicon Space Technology Corp.
    Inventor: Wesley H. Morris