Patents Assigned to Silicone Graphics Inc.
  • Patent number: 6389581
    Abstract: An aspect of interconnect design for optimizing delay characteristics of interconnects. The interconnect design for delay characteristics optimization is performed using a method for optimizing repeaters positioning along interconnects. The method includes inserting repeaters in positions along a first interconnect at predetermined intervals that are related to signals transition time. The method further includes inserting repeaters in positions along a second interconnect at the predetermined intervals, the second interconnect being a neighbor of the first interconnect. The positions of repeaters along the second interconnect are offset, by a predetermined length, relative to the positions of repeaters along the first interconnect so that the repeaters positions along the second interconnect are shifted relative to the repeaters positions along the first interconnect. In one embodiment, the predetermined length is half (0.
    Type: Grant
    Filed: September 2, 1999
    Date of Patent: May 14, 2002
    Assignee: Silicone Graphics Inc.
    Inventors: Sudhakar Muddu, Egino Sarto