Patents Assigned to Siliconsystems, Inc.
  • Publication number: 20090031073
    Abstract: A solid-state storage subsystem, such as a non-volatile memory card or drive, includes multiple interfaces and a memory area storing information used by a data arbiter to prioritize data commands received through the interfaces. As one example, the information may store a priority ranking of multiple host systems that are connected to the solid-state storage subsystem, such that the data arbiter may process concurrently received data transfer commands serially according to their priority ranking. A host software component may be configured to store and modify the priority control information in solid-state storage subsystem's memory area.
    Type: Application
    Filed: July 26, 2007
    Publication date: January 29, 2009
    Applicant: SiliconSystems, Inc.
    Inventors: Mark S. Diggs, David E. Merry, JR.
  • Publication number: 20080294835
    Abstract: A non-volatile storage subsystem solution is provided for embedded applications. The storage subsystem is preferably designed to communicate with the host system using a signal interface, such as a USB or SATA interface, that uses substantially fewer signal lines than the IDE interface traditionally used for embedded applications. Thus, the amount of board real estate used to carry interface signals in the host system is reduced. To further reduce board real estate, the host system may include a processor that includes an integrated controller (e.g., a USB or SATA controller) corresponding to the host-subsystem signal interface. The storage subsystem may plug into, and lock to, an internal connector on a circuit board of the host system.
    Type: Application
    Filed: May 24, 2007
    Publication date: November 27, 2008
    Applicant: SiliconSystems, Inc.
    Inventors: David E. Merry, JR., Mark S. Diggs
  • Publication number: 20080294834
    Abstract: A non-volatile storage subsystem solution is provided for embedded applications. The storage subsystem is preferably designed to communicate with the host system using a signal interface, such as a USB or SATA interface, that uses substantially fewer signal lines than the IDE interface traditionally used for embedded applications. Thus, the amount of board real estate used to carry interface signals in the host system is reduced. To further reduce board real estate, the host system may include a processor that includes an integrated controller (e.g., a USB or SATA controller) corresponding to the host-subsystem signal interface. The storage subsystem may plug into, and lock to, an internal connector on a circuit board of the host system.
    Type: Application
    Filed: May 24, 2007
    Publication date: November 27, 2008
    Applicant: SiliconSystems, Inc.
    Inventors: David E. Merry, JR., Mark S. Diggs
  • Patent number: 7447807
    Abstract: A storage subsystem comprises a set of zone definitions that uses physical block addresses to divide a memory array in the storage subsystem into zones or segments. A set of zone parameters defines user access modes and security levels for each of the segments. Defining zones for the memory array provide flexibility and increased protection for data stored in the memory array. For example, data of one zone can be quickly erased without affecting data stored in other zones and critical data can be stored in read-only zones to prevent inadvertent overwrite.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: November 4, 2008
    Assignee: Siliconsystems, Inc.
    Inventors: David E. Merry, Mark S. Diggs, Gary A. Drossel, Michael J. Hajeck
  • Patent number: 7430136
    Abstract: A storage system that comprises multiple solid-state storage devices includes a command set that enables a host system to initiate one or more types of purge operations. The supported purge operations may include an erase operation in which the storage devices are erased, a sanitization operation in which a pattern is written to the storage devices, and/or a destroy operation in which the storage devices are physically damaged via application of a high voltage. The command set preferably enables the host system to specify how many of the storage devices are to be purged at a time during a purge operation. The host system can thereby control the amount of time, and the current level, needed to complete the purge operation. In some embodiments, the number of storage devices that are purged at a time may additionally or alternatively be selectable by a controller of the storage system.
    Type: Grant
    Filed: July 18, 2006
    Date of Patent: September 30, 2008
    Assignee: Siliconsystems, Inc.
    Inventors: David E. Merry, Jr., Michael J. Hajeck
  • Patent number: 7126857
    Abstract: A storage subsystem, such as a flash memory card, includes a voltage detection circuit that monitors the power signal from a host system to detect anomalies. The voltage detection circuit responds to a power signal anomaly by asserting a signal, such as a busy signal on a standard ready/busy signal line, to block the host system from performing write operations to the storage subsystem during presence of the anomaly. The storage system may also include a backup power source, such as a charge pump circuit, a capacitive array, and/or a rechargeable battery, that provides power to a controller of the storage subsystem during the presence of the anomaly, such that the storage system can complete outstanding operations.
    Type: Grant
    Filed: January 18, 2005
    Date of Patent: October 24, 2006
    Assignee: SiliconSystems, Inc.
    Inventor: Michael J. Hajeck
  • Patent number: 6856556
    Abstract: A storage subsystem, such as a flash memory card, includes a charge pump that receives a power signal from a host system, and generates a regulated power signal that is provided to the storage subsystem's controller. When the power signal from the host is interrupted, the charge pump additionally acts as a backup power supply such that the storage subsystem can continue to operate temporarily. The storage subsystem also includes a voltage detection circuit that monitors the power signal from the host system to detect anomalies therein. The voltage detection circuit responds to detection of an anomaly by asserting a busy signal to block the host system from performing write operations to the storage subsystem. By asserting the busy signal, the voltage detection circuit substantially ensures that the backup, regulated power provided by the charge pump will be sufficient for the controller to complete all outstanding operations.
    Type: Grant
    Filed: April 3, 2003
    Date of Patent: February 15, 2005
    Assignee: Siliconsystems, Inc.
    Inventor: Michael J. Hajeck