Abstract: The present invention relates to a system which assists a user (K) in the matters of cooking process and kitchen shopping by means of a user device, which is in communication with various kitchenware and gives feedback by observing the cooking progress of the user. The inventive system comprises user device which is used by the user (K), kitchenware, kitchenware Internet of Things (IOT) modules, augmented reality module, camera, image processing module, localization module, suggestion unit, performance evaluation unit, menu database, personal target database and personal preferences database.

Abstract: The present disclosure generally relates systems, apparatus, and methods for security devices, in particular, low-power, security devices and other devices. The devices typically connect to the Internet or other networks only on an intermittent, event-based basis, typically by cellular modem. The invention meets a need for security devices, as well as other devices, that can connect to the Internet and other networks but that are low-power and/or intermittently connected to networks such as the Internet on an intermittent and/or on demand basis. This renders them more secure, less susceptible to hacking and other attacks, less prone to continuously gathering data that a user might consider to be superfluous and/or invasive in terms of data collected, and can make them low-power, thus allowing them to run on battery for long periods of time.

Abstract: A tool holder includes a basic body, in which a tool receiving region is located, a circular cylindrical clamping chuck having several joints and an external thread which has an external pitch angle, as well as a union nut having an internal thread which has an internal pitch angle. The union nut has a stopping face on the basic body or on the clamping chuck. The external pitch angle is different from the internal pitch angle.

Abstract: A tool holder includes a basic body, in which a tool receiving region is located, a circular cylindrical clamping chuck having several joints and an external thread which has an external pitch angle, as well as a union nut having an internal thread which has an internal pitch angle. The union nut has a stopping face on the basic body or on the clamping chuck. The external pitch angle is different from the internal pitch angle.

Abstract: An air distribution system for providing rinse air to a gas cleaner is provided, which includes a filter housing, a holding plate wherein holes are arranged in concentric circles for holding filter bags or filter elements in the filter housing, filter bags or filter elements, rinse air supply means, and an air distribution device for distributing rinse air. In the system, a tube (6) is arranged rotatable in a rotatable distributor body (109) in the air distribution device (101), which distributor body (109) are connected to tubes (7), and which distributor body (109) includes rotating means (4, 5, 104), and when the distributor body (109) is rotated, tubes (7) are moved from a position above one hole (110) in the holding plate (111) to another hole (110) in the holding plate.

Abstract: A memory circuit includes a high voltage region providing storage of a nonvolatile bit, and a low voltage region providing at least partial storage of a volatile bit. The high and low voltage regions are isolated from one another and formed by a plurality of transistors in series between a current source and a bit line.

Abstract: A memory cell array includes reference cells each associated with a plurality of data cells of the array.

Abstract: A memory circuit includes a single transistor storing both volatile and nonvolatile bit charges.

Abstract: A memory system power management process includes providing a first level of power to operate a memory system while a primary power source is enabled, detecting an interruption of the primary power source, increasing a frequency of an oscillator driving a charge pump of a power converter providing the first level of power, and beginning a memory operation that increases a load on the power converter.

Abstract: A process of operating a memory array includes performing all volatile and nonvolatile operations on an nvDRAM cell array via a single data interface and using only DRAM-level signals on the data interface.

Abstract: A method of operating a nonvolatile memory circuit having a plurality of transistors arranged in series between a voltage/current source node and recall sink node includes asserting a gate bias on an isolation transistor between the source node and a charge storage transistor during nonvolatile STANDBY.

Abstract: A memory circuit includes volatile memory cells coupled to bit lines, and nonvolatile memory cells coupled to the volatile memory cells via the bit lines but not via complement bit lines.

Abstract: A memory access device includes logic to switch data from a processor memory bus to a memory bus in a first operational mode, and to switch data from a test bus to the memory bus in a second operational mode, and logic to switch address signals from the processor memory bus to the memory bus in the first operational mode. In the second operational mode the device accepts from the test bus a starting memory address for memory reads and writes, and automatically and independently of the test bus adjusts a memory address for reads and writes during burst memory operations.

Abstract: A memory subsystem includes a volatile memory, a nonvolatile memory, and a controller including logic to interface the volatile memory to an external system. The volatile memory is addressable for reading and writing by the external system. The memory subsystem includes a power controller with logic to detect when power from the external system to at least one of the volatile and nonvolatile memories and to the controller fails. When external system power fails, backup power is provided to at least one of the volatile and nonvolatile memories and to the controller for long enough to enable the controller to back up data from the volatile memory to the nonvolatile memory.

Abstract: A memory subsystem is configured to obtain power from an external system and from at least one power capacitors. The memory subsystem includes logic to verify the power delivery capability of the power capacitors.

Abstract: A memory subsystem may include logic to make available to the device into which it is installed at least one portion of the volatile memory that will be backed up to the nonvolatile memory in the event of device power failure. The logic may make available to the device at least one portion of the volatile memory that will not be backed up to the nonvolatile memory in the event of device power failure, and make available to the device at least one portion of the nonvolatile memory that is not reserved for backups from the volatile memory.

Abstract: A memory subsystem includes volatile memory and nonvolatile memory, and logic to interrupt a power down save operation of the memory subsystem upon detection of a restoration of system power, and to enable use of the memory subsystem by the system if sufficient nonvolatile memory capacity of the memory subsystem is available to backup an amount of the volatile memory capacity of the memory subsystem.

Abstract: A memory circuit includes a controlled current source coupled to an input to a nonvolatile cell, and a second controlled current source coupled to a volatile cell, the volatile cell coupled to receive current from the controlled current source via the nonvolatile cell.

Abstract: An oven for thermal treating a web includes: an over chamber; a web transport for transporting a web through the oven chamber; a heater for heating the web in the oven chamber; an exhaust system connected to the oven chamber; a model-based controller for controlling the web temperature profile; and an air delivery system. The model-based controller includes: (i) a plurality of sensor inputs; (ii) a plurality of control signal outputs; (iii) a multi-variable controller with first principles guidelines and oven and process boundaries for a first specific oven; (iv) a desire process profile; and (v) a translator module for permitting the desire process profile to be transferred to at least a second specific oven.