Patents Assigned to Sirific Wireless Corporation
  • Publication number: 20090036068
    Abstract: A wireless system having high spectral purity output signals. The wireless system has a transmitter circuit for transmitting an output signal and a power amplifier for amplifying the output signal for wireless transmission via an antenna. Positioned in-line with the output signal between the transmitter circuit and the power amplifier is a harmonic trap configured for inhibiting harmonics within a predetermined frequency range generated by the power amplifier from leaking into the transmitter circuit. The harmonic trap can be implemented as a discrete device, or integrated within the transmitter circuit or integrated within the power amplifier. By inhibiting the harmonics from leaking into the transmitter circuit, degraded performance of the transmitter circuit is prevented.
    Type: Application
    Filed: August 2, 2007
    Publication date: February 5, 2009
    Applicant: SIRIFIC WIRELESS CORPORATION
    Inventors: Simon HUGHES, Jason JANTZI, Xavier ULDRY
  • Publication number: 20090021321
    Abstract: The invention is directed at a hybrid modulation apparatus which combines a polar modulation circuit and a linear modulation circuit. The hybrid apparatus allows a communications device to function as a polar or a linear modulation circuit with less components as the output of the linear modulation circuit is an input of the polar modulation circuit.
    Type: Application
    Filed: July 17, 2007
    Publication date: January 22, 2009
    Applicant: SIRIFIC WIRELESS CORPORATION
    Inventors: Tajinder MANKU, Abdellatif BELLAOUAR
  • Publication number: 20080182537
    Abstract: An integrated automatic IIP2 calibration architecture for wireless transceivers is disclosed. The architecture enables a wireless transceiver to generate a test radio frequency (RF) signal having a second order tone with minimal additional circuitry. In particular, the test RF signal is generated using a combination of native transceiver circuits and test adaptor circuits. Native transceiver circuits are those circuits implemented on the transceiver chip for executing native transceiver functions during normal operation, which can be used for generating the test (RF) signal. Test adaptor circuits are added to the transceiver chip, more specifically to the native circuits, for enabling the native circuits to generate the test RF signal in a self-test mode of operation. Circuits for implementing a particular IIP2 minimizing scheme can be included on the transceiver chip for automatic IIP2 calibration during the self-test mode of operation.
    Type: Application
    Filed: January 25, 2007
    Publication date: July 31, 2008
    Applicant: SIRIFIC WIRELESS CORPORATION
    Inventors: Tajinder Manku, Abdellatif Bellaouar, Alan Holden, Hamid R. Safari
  • Publication number: 20080129434
    Abstract: The present invention is directed at an inductor which is capable of providing a variable inductance. The variable inductor is typically mounted/stored on an integrated circuit chip to provide continuous or multiple variable inductor values for wireless applications and the like.
    Type: Application
    Filed: November 30, 2006
    Publication date: June 5, 2008
    Applicant: SIRIFIC WIRELESS CORPORATION
    Inventor: Javad KHAJEHPOUR
  • Patent number: 7345550
    Abstract: A phase locked loop (PLL) with reduced loop filter components having dual charge pumps and corresponding dual signal paths that reduce on-chip component size within the filters. The dual paths are combined advantageously via dual varactors within a voltage controlled oscillator to further reduce loop filter components. The PLL removes the drawbacks of noise introduced by circuitry normally used for summing dual path configurations.
    Type: Grant
    Filed: December 5, 2005
    Date of Patent: March 18, 2008
    Assignee: Sirific Wireless Corporation
    Inventors: Abdellatif Bellaouar, Ahmed R. Fridi, Arul M. Balasubramaniyan
  • Patent number: 7343135
    Abstract: There is a need for an inexpensive, high-performance, fully-integrable, multi-standard transceiver, which suppresses spurious noise signals. The invention provides a topology that satisfies this need, using a first signal generator which produces an oscillator signal f1 and a second signal generator which produces a mono-tonal mixing signal ?2, where f1 is a multiple of the frequency of ?2; and a logic circuit for generating a multi-tonal mixing signal ?1, where ?1*?2 has significant power at the frequency of said local oscillator signal being emulated, neither of said cp1 nor said ?2 having significant power at the carrier frequency of said input signal x(t) or said LO signal being emulated.
    Type: Grant
    Filed: February 25, 2003
    Date of Patent: March 11, 2008
    Assignee: Sirific Wireless Corporation
    Inventor: Tajinder Manku
  • Publication number: 20080014894
    Abstract: A method and system for dynamically shifting spurious tones away from the desired frequency in a virtual local oscillator receiver, such that any undesired signal residing at such spurious tones are effectively delineated from the desired signal and removed from the RF input signal. The system detects the presence of potential undesired blocker signals in the RF input signal, and initiates an iterative power comparison and mixer signal adjustment loop. As the virtual local oscillator uses two mixer signals, the frequency of one of the mixer signals is adjusted during the loop until the power of the down-converted signal is minimized to a predetermined level. Minimized power in the down-converted signal is indicative of the absence of the blocker signal, since the presence of a relatively high power signal is indicative of a blocker signal overlapping with a desired signal.
    Type: Application
    Filed: May 13, 2005
    Publication date: January 17, 2008
    Applicant: SIRIFIC WIRELESS CORPORATION
    Inventors: Tajinder Manku, Masoud Kahrizi
  • Publication number: 20080007334
    Abstract: A CMOS transconductor for cancelling third-order intermodulation is provided. The transconductor includes a transconductance circuit and a tuneable distortion circuit. The transconductance circuit takes an input voltage and generates an output current having a transconductance element and an IM3 element. The distortion circuit takes the same input voltage and generates a current having an IM3 element of equal amplitude and opposite phase to the IM3 element of the transconductance circuit. A controller circuit tunes the distortion circuit to adjust its IM3 element to substantially equal the amplitude of the IM3 of the transconductance circuit. The distortion and transconductance circuits are arranged to sum their output currents thereby effectively cancelling the IM3 elements, leaving the transconductance relatively unmodified.
    Type: Application
    Filed: May 12, 2005
    Publication date: January 10, 2008
    Applicant: SIRIFIC WIRELESS CORPORATION
    Inventor: Tajinder Manku
  • Patent number: 7277683
    Abstract: The present invention relates generally to communications, and more specifically to a method and apparatus for generating local oscillator signals used for up- and down-conversion of RF (radio frequency) signals. A major problem in the design of modulators and demodulators, if the leakage of local oscillator (LO) signals into the received signal path. The invention presents a number of highly integratable circuits which resolve the LO leakage problem, using regenerative divider circuits acting on oscillator signals which are running at a multiple or fraction of the frequency of the desired LO signal, to generate in-phase (I) and quadrature (Q) mixing signals. Embodiments of these circuits also use harmonic subtraction and polyphase mixers, as well as virtual local oscillator TM (VLO) mixing signals. VLO mixing signals are signal pairs which emulate local oscillator signals by means of complementary mono-tonal and multi-tonal mixing signals.
    Type: Grant
    Filed: January 8, 2004
    Date of Patent: October 2, 2007
    Assignee: Sirific Wireless Corporation
    Inventors: Sathwant Dosanjh, William Kung, Tajinder Manku
  • Patent number: 7265629
    Abstract: A system for generating a supply voltage, temperature and process compensated gain control voltage from a digital data word. In particular, the compensated gain voltage control voltage maintains a linear relationship between a change in gain in response to an input gain control voltage for a gain circuit of a transmitter circuit. A monitor circuit senses at least one of the supply voltage, temperature and process parameters, and generates a first set of digital signals corresponding to the sensed parameter. A digital compensator circuit converts the input gain control voltage into a second set of digital signals, and decodes the combined first and second set of digital signals to provide a data word. The data word is converted into an analog voltage representing the compensated gain voltage control voltage. The digital compensator circuit includes a table of compensation values, each accessible by a distinct combination of the first and second set of digital signals.
    Type: Grant
    Filed: March 29, 2005
    Date of Patent: September 4, 2007
    Assignee: Sirific Wireless Corporation
    Inventor: Tajinder Manku
  • Patent number: 7263344
    Abstract: The present invention relates generally to communications, and more specifically to a method and apparatus for minimizing DC offset and second-order modulation products (IM2 noise) while demodulating RF signals. The principle of the invention can be applied to differential, down-conversion circuits (50) consisting of two differential mixers (54, 56) in series, a follows: a pair of current sources Ia and Ib are used to provide current to positive and negative channels of the first differential mixer (54). Providing current to the amplifying transistors of the first mixer (54) reduces the current drawn through the active mixer switches, reducing the noise generated. The current sources 1a and 1b are trimmed in a complementary manner where 1a=I+Delta1, and 1b=Delta1. The value of ?1 can be determined in a number of manners; for example, it could be established by testing after the circuit has been fabricated, and the value stored on-chip, for future use.
    Type: Grant
    Filed: October 15, 2003
    Date of Patent: August 28, 2007
    Assignee: Sirific Wireless Corporation
    Inventor: Tajinder Manku
  • Patent number: 7245187
    Abstract: The present invention relates generally to amplifiers, and more specifically to multi-band and/or multi-standard low noise amplifiers. There are currently no inexpensive, highperformance, fully-integrable, multi-standard low noise amplifiers (LNAs) available. The invention provides a suitable LNA for a multi-band and/or multi-standard receiver in wireless and other applications.
    Type: Grant
    Filed: July 24, 2003
    Date of Patent: July 17, 2007
    Assignee: Sirific Wireless Corporation
    Inventor: Javad Khajehpour
  • Patent number: 7242334
    Abstract: A CMOS hybrid analog-digital receiver core where filtering and gain functions are implemented in the digital domain. The analog portion of the receiver core includes standard circuits such as a low noise amplifier for receiving an RF input signal, and a mixer circuit for down-converting the RF input signal to a base band frequency signal. The analog to digital conversion function is provided by a merged ADC filter circuit having a low order filter stage and an ADC stage. The low order filter stage performs low order filtering of the base band signal to reduce dynamic range and clock requirements for subsequent analog to digital conversion the ADC stage. The two circuit stages are considered to be merged since they both consist of an interconnection of identical transconductance cells, where each transconductance cell includes a series of interconnected CMOS inverters.
    Type: Grant
    Filed: December 9, 2005
    Date of Patent: July 10, 2007
    Assignee: SiRiFIC Wireless Corporation
    Inventor: Alan R. Holden
  • Patent number: 7215931
    Abstract: This patent describes a method and system which overcomes the LO-leakage problem during modulation and demodulation, common to direct conversion and similar RF transmitters and receivers. This problem is solved using a virtual local oscillator (VLO™) signal which emulates mixing with a local oscillators (LO) signal. The VLO signal is constructed using complementary mixing signals that suppress mixing power in the bandwidth of the input signal, and within the bandwidth of the output frequency. Specifically, mixing is done in two or more stages, using time-varying mixing signals ?1 and ?2 which satisfy the following criteria: ?1*?2 having significant power at the frequency of the LO being emulated, one of ?1 and ?2 having minimal power around the frequency of the output signal y(t), and the other of ?1 and ?2 having minimal power around the center frequency, fRF, of the input signal x(t).
    Type: Grant
    Filed: June 19, 2002
    Date of Patent: May 8, 2007
    Assignee: Sirific Wireless Corporation
    Inventors: Chris Snyder, Tajinder Manku, Gareth Weale, Lawrence Wong
  • Patent number: 7167063
    Abstract: A low-phase noise voltage control oscillator (VCO) comprising a voltage source for supplying control voltage to the VCO core; a phase lock loop, having an output connected to an input of the voltage source; a VCO core, including an amplifier circuit with noiseless biasing and a tank circuit with noiseless biasing of the varactors; having an output connected to an input of the phase lock loop; and an attenuator, located between the voltage source and the VCO core, for reducing phase noise from the voltage source to the VCO core.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: January 23, 2007
    Assignee: Sirific Wireless Corporation
    Inventors: Volodymyr Yavorskyy, Tajinder Manku, James Wei
  • Patent number: 7164897
    Abstract: An inexpensive, high-performance, fully-integrable, multi-standard transceiver with a topology including: an active mixer, followed by a high pass filter, and a passive mixer. The input signal is modulated up, or demodulated down, using a pair of complementary, aperiodic mixing signals. The use of aperiodic mixing signals allows a fully-integrated transceiver to be built. Embodiments of the active mixer include those having electrically-adjustable performance and allowing multiple RF signal inputs. This allows the topology to be employed in multi-band, multi-frequency applications, while still providing high performance.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: January 16, 2007
    Assignee: Sirific Wireless Corporation
    Inventors: Tajinder Manku, Yang Ling, William Kung
  • Publication number: 20060246861
    Abstract: The present invention relates generally to communications, and more specifically to a method and apparatus for generating local oscillator signals used for up- and down-conversion of RF (radio frequency) signals. A major problem in the design of modulators and demodulators, if the leakage of local oscillator (LO) signals into the received signal path. The invention presents a number of highly integratable circuits which resolve the LO leakage problem, using regenerative divider circuits acting on oscillator signals which are running at a multiple or fraction of the frequency of the desired LO signal, to generate in-phase (I) and quadrature (Q) mixing signals. Embodiments of these circuits also use harmonic subtraction and polyphase mixers, as well as virtual local oscillator TM (VLO) mixing signals. VLO mixing signals are signal pairs which emulate local oscillator signals by means of complementary mono-tonal and multi-tonal mixing signals.
    Type: Application
    Filed: January 8, 2004
    Publication date: November 2, 2006
    Applicant: SIRIFIC WIRELESS CORPORATION
    Inventors: Sathwant Dosanjh, William Kung, Tajinder Manku
  • Publication number: 20060141952
    Abstract: The present invention relates generally to communications, and more specifically to a method and apparatus of modulating baseband and RF (radio frequency) signals. A modulator topology is disclosed in which an input signal x(t) is up-converted to an output signal y(t), either by mixing it with two mixing signals ?1 and ?2 (“pseudo-direct conversion” mode), or by mixing it with only one mixing signal ?2 (“direct-conversion” mode). In pseudo-direct modulation mode, the ?1 and ?2 mixing signals emulate a local oscillator signal; the product ?1*?2 has significant power at the frequency of a local oscillator signal being emulated, but neither ?1 nor ?2 have significant power at the frequency of the input signal x(t), the LO signal being emulated, or the output signal ?1 ?2 x(t).
    Type: Application
    Filed: January 6, 2004
    Publication date: June 29, 2006
    Applicant: SiRiFIC Wireless Corporation
    Inventors: William Kung, Christopher Snyder
  • Patent number: 7046980
    Abstract: This patent describes a method and system which overcomes the LO-leakage problem of direct conversion and similar RF transmitters and receivers. To solve this problem a virtual LO™ signal is generated which emulates mixing with a local oscillator (LO) signal. However, the virtual local oscillator (VLO) signal is constructed using signals that do not contain a significant amount of power (or no power at all) at the wanted output RF frequency, so there is no LO component to leak to the output. The invention also does not require sophisticated filters or large capacitors as other designs in the art, so it is fully integratable.
    Type: Grant
    Filed: September 1, 2000
    Date of Patent: May 16, 2006
    Assignee: SiRiFIC Wireless Corporation
    Inventors: Tajinder Manku, Chris Snyder, Gareth Weale, Lawrence Wong
  • Patent number: 7016662
    Abstract: This patent describes a method and system which overcomes the LO-leakage problem of direct conversion and similar RF transmitters. To solve this problem a virtual LO™ signal is generated within the baseband which is tuned to the incoming RF signal. The virtual local oscillator (VLO) signal is constructed using signals that do not contain a significant amount of power (or no power at all) at the wanted output RF frequency. Any errors is generating the virtual LO signal are minimized using a closed loop correction scheme.
    Type: Grant
    Filed: September 1, 2000
    Date of Patent: March 21, 2006
    Assignee: Sirific Wireless Corporation
    Inventors: Tajinder Manku, Chris Snyder, Gareth Weale