Abstract: A system includes a shard generation circuit configured to create shards from a security credential, and to recreate the security credential from the shards. The system includes a secret generation circuit configured to create secrets from a shard and to recreate the shard from a subset of the secrets, and store at least one of secrets in a location. The system includes another secret generation circuit configured to create secrets from another shard, recreate the other shard of the shards, and store at least one the shards in another, different location.

Abstract: A system includes a server interface and a management server. The management server includes instructions for execution by a processor. The instructions, when loaded and executed by the processor, cause the processor to access a server through the remote interface and, through the interface, monitor current usage by an electronic device communicatively coupled to the server. The instructions further cause the processor to determine a security status of the electronic device based upon the current usage, and to take a corrective action based upon the security status.

Abstract: A system includes servers, each server including a baseboard management controller (BMC) and operating environments including motherboards and processors. One of the BMCs includes circuitry to determine that the other server is in a standby mode. In a standby mode, the operating environment including the motherboard and processor is powered down and the BMC is powered only through a connection between the BMCs. The first BMC determines that additional resources for execution by the system from the other server are to be activated, and send a wake-up signal to the other BMC. The other BMC includes circuitry configured to receive the wake-up signal, wake the operating environment, and provision the operating environment, without power from the operating environment.

Abstract: A fan device used with respect to a computing device. The fan device includes at least two fans that provide airflow for the computing device and a controller that adjusts the fans' speeds in an attempt to avoid harmonic vibrations of the at least two fans. The fan device may include at least one sensor, and the controller may adjust the fans' speeds based at least on information from the sensor(s) in the attempt to avoid the harmonic vibrations. The attempt to avoid the harmonic vibrations may also attempt to mitigate one or more of turbulence, pressure, over-heating, power consumption, or noise in, by, or around the computing device. Reversal of airflow may also be used. A fan bar that enables isolation of ground return noise may also be used. The controller may use sums of primes calculations, phase analysis, common divisor calculations, and the like. Also, associated methods.

Abstract: An apparatus includes a processor, a memory communicatively coupled to the processor, an acceleration framework circuit communicatively coupled to the memory and the processor, and a device driver. The device driver is configured to receive a request for data manipulation by a software defined storage (SDS) application. The device driver is configured to determine whether the request for data manipulation can be offloaded from the processor to the acceleration framework circuit. The device driver is configured to, based upon the determination of whether the request for data manipulation can be offloaded from the processor to the acceleration framework circuit, selectively cause the request to be executed by the acceleration framework circuit or the SDS application through execution on the processor.

Abstract: A fan device used with respect to a computing device. The fan device includes at least two fans that provide airflow for the computing device and a controller that adjusts the fans' speeds in an attempt to avoid harmonic vibrations of the at least two fans. The fan device may include at least one sensor, and the controller may adjust the fans' speeds based at least on information from the sensor(s) in the attempt to avoid the harmonic vibrations. The attempt to avoid the harmonic vibrations may also attempt to mitigate one or more of turbulence, pressure, over-heating, power consumption, or noise in, by, or around the computing device. Reversal of airflow may also be used. A fan bar that enables isolation of ground return noise may also be used. The controller may use sums of primes calculations, phase analysis, common divisor calculations, and the like. Also, associated methods.

Abstract: A baseboard includes a first connection configured to electrically interface with a motherboard, a second connection configured to electrically interface with a module, and a switch circuit configured to route data channels and power channels between the motherboard and the module. The first connection is configured to interface with more than one connection protocol or standard. The second connection is configured to interface with the more than one connection protocol or standard. The baseboard allows for cableless connections to allow unobstructed airflow over the components.

Abstract: A system includes a top printed circuit (PCB) including an array of contact pads, a bottom PCB including an array of contact pads, at least one interposer positioned between the top and bottom PCBs, including: an array of top connectors configured to contact the array of contact pads of the top PCB; an array of bottom connectors configured to contact the array of contact pads of the bottom PCB; and interconnections configured to electrically connect the top connectors and the bottom connectors, at least one spacer element positioned between the top PCB and the bottom PCB and configured to contribute to maintaining a specified distance between the top PCB and the bottom PCB; and at least one fastener of the top PCB and the bottom PCB. The system further includes fasteners configured to press the top PCB, the interposer, the bottom PCB, and the spacer layer together.

Abstract: An apparatus includes an operating environment including a motherboard and a processor, and a baseboard management controller (BMC) including circuitry configured to determine that another server is in a standby mode. The other server includes its own BMC and operating environment, and, in the standby mode, the second operating environment is powered down and the second BMC is powered only through a connection to the BMC of the apparatus. The BMC of the apparatus is further configured to determine that additional resources for execution by a system including the apparatus are to be activated. The BMC is further configured to send a control signal to the other BMC, wherein the control signal is configured to issue a wake-up signal to the other BMC to wake at least a portion of the other BMC's operating environment, and to provision the other BMC's operating environment.

Abstract: An article of manufacture includes a non-transitory machine-readable medium. The medium includes instructions. The instructions, when loaded and executed by a processor, configure the processor to, from an operating system, determine that a software defined storage (SDS) application installed in the operating system is configured to access a disk. The disk includes an SDS partition. The instructions are further configured to cause the processor to determine that the disk is to be monitored for performance and access a monitoring partition on the disk. The monitoring partition is inaccessible to the SDS application. The instructions are further configured to cause the processor to write test data to the monitoring partition and validate the test data written to the monitoring partition.

Abstract: An apparatus includes a communications interface and a management server. The management server is configured to access servers through the interface, determine that additional resources are needed for execution by a system, and determine that one of the servers is in a standby mode. In the standby mode, the server is powered down and a baseboard management controller (BMC) therein is only powered through a connection from the apparatus or another server of the network. The management server is configured to determine that additional resources for execution by the system from the server are to be activated and cause a wake-up signal to be sent to the BMC, wherein the wake-up signal is configured to cause the BMC to wake and provision the operating environment of the server.

Abstract: A processing acceleration system including at least one gate array that performs finite field arithmetic and at least one controller that sends information to the gate array(s) upon a determination that sending the information, performing the finite field arithmetic by the gate array(s), and sending results of the finite field arithmetic to at least one destination is more efficient than general-purpose computing processor(s) performing the finite field arithmetic and sending the results to the at least one destination. The gate array(s) may include field programmable gate array(s), and the destination(s) may include the general-purpose computing processor(s) or storage devices. The finite field arithmetic may include galois field arithmetic such as modular arithmetic, for example as may be used with respect to erasure coding for storage device(s).

Abstract: A power supply system which connects a DC consumer to an AC supply includes an AC-DC converter and a UPS. The AC-DC converter has an input to which alternating current from the AC supply is applied and an output at which DC current is developed. The UPS has an input to which direct current from the AC-DC converter is applied and an output at which DC current is developed. The DC current developed at the output of the AC-DC converter and DC current developed at the output of the UPS are applied to the DC consumer selectively in parallel with each other or exclusively to each other.

Abstract: A power supply system which connects a DC consumer to an AC supply includes an AC-DC converter and a UPS. The AC-DC converter has an input to which alternating current from the AC supply is applied and an output at which DC current is developed. The UPS has an input to which direct current from the AC-DC converter is applied and an output at which DC current is developed. The DC current developed at the output of the AC-DC converter and DC current developed at the output of the UPS are applied to the DC consumer selectively in parallel with each other or exclusively to each other.

Abstract: A fan device used with respect to a computing device. The fan device includes at least two fans that provide airflow for the computing device and a controller that adjusts the fans' speeds in an attempt to avoid harmonic vibrations of the at least two fans. The fan device may include at least one sensor, and the controller may adjust the fans' speeds based at least on information from the sensor(s) in the attempt to avoid the harmonic vibrations. The attempt to avoid the harmonic vibrations may also attempt to mitigate one or more of turbulence, pressure, over-heating, power consumption, or noise in, by, or around the computing device. Reversal of airflow may also be used. A fan bar that enables isolation of ground return noise may also be used. The controller may use sums of primes calculations, phase analysis, common divisor calculations, and the like. Also, associated methods.

Abstract: Techniques of erasure encoding that include receiving data for storage, inspecting the data for purposes of erasure encoding, and beginning preemptive erasure encoding of the data without waiting for the data to be completely delivered. The data may be received in packets over a network through an ordered transmission protocol, for example a reliable protocol such as TCP. Inspection of headers of the packets may determine which of the data will be subject to the step of beginning preemptive erasure encoding. This inspection may be “deep packet inspection” as described in more detail below. Also, systems that may perform the foregoing techniques including via use of network interface cards, processors, and/or logic that perform these techniques.