Abstract: In an embodiment, an apparatus includes a first integrated circuit (IC) chip configured to receive a timing signal and a reference clock signal; a second IC chip configured to receive the timing signal from the first IC chip and the reference clock signal; and a third IC chip configured to receive the timing signal from the second IC chip and the reference clock signal. The second IC chip is electrically coupled between the first and third IC chips. The first, second, and third IC chips are configured to generate respective first, second, and third reference time signals based on the timing signal and the reference clock signal. Each of the first, second, and third reference time signals is associated with a count of a number of cycles of the reference clock signal starting from a same particular cycle of the reference clock signal.

Abstract: In embodiments, an apparatus includes a beamformer including a plurality of inputs and a plurality of outputs, a plurality of input vias, and a plurality of output vias. Each input of the plurality of inputs electrically couples to a respective input via of the plurality of input vias. Each output of the plurality of outputs electrically couples to a respective output via of the plurality of output vias. The beamformer is included in a first layer, wherein the plurality of input vias are configured to electrically couple to termination trace ends of a plurality of hierarchical networks provided on at least second and third layers, and wherein the plurality of hierarchical networks comprises at least three hierarchical networks.

Abstract: In an embodiment, an apparatus includes a first integrated circuit (IC) chip configured to receive a timing signal and a reference clock signal; a second IC chip configured to receive the timing signal from the first IC chip and the reference clock signal; and a third IC chip configured to receive the timing signal from the second IC chip and the reference clock signal. The second IC chip is electrically coupled between the first and third IC chips. The first, second, and third IC chips include respectively first, second, and third phase lock loop (PLL). The first, second, and third IC chips are configured to generate respective first, second, and third reference time signals based on the timing signal and the reference clock signal. The first, second, and third PLLs are synchronized to each other based on the respective first, second, and third reference time signals.

Abstract: In some embodiments, an apparatus includes a first layer having a first plurality of electrically conductive traces comprising a first portion of a plurality of hierarchical networks; a second layer having a second plurality of electrically conductive traces comprising a second portion of the plurality of hierarchical networks; and a plurality of vias electrically connecting the first plurality of electrically conductive traces of the first layer to the respective second plurality of electrically conductive traces of the second layer to define the plurality of hierarchical networks. The first plurality of electrically conductive traces is orientated in a first direction and the second plurality of electrically conductive traces is orientated in a second direction different from the first direction.

Abstract: Embodiments of present disclosure are directed to apparatuses, systems, and methods relating to antenna apertures in phased array antenna systems directed to configuring antenna lattices in a space tapered configuration and mapping from the antenna lattices, interspersing of antenna elements in an antenna aperture, and rotation of antenna element in the antenna aperture for purity polarization.

Abstract: In an embodiment, a receiver included in a communications system includes a channel extractor configured to segregate a received signal into a plurality of channel signals, wherein the plurality of channel signals includes a plurality of data signals; and a plurality of decoders electrically coupled to the channel extractor and configured to decode each of the plurality of channel signals into a respective plurality of decoded data beam portions.

Abstract: In an embodiment, an apparatus includes a first plurality of digital beamformers associated with a first channel, the first plurality of digital beamformers configured to encode each data beam of a first plurality of data beams of the first channel to generate an encoded first plurality of data beams; a second plurality of digital beamformers associated with a second channel different from the first channel, the second plurality of digital beamformers configured to encode each data beam of a second plurality of data beams of the second channel to generate an encoded second plurality of data beams; and a channel combiner, electrically coupled to the first and second plurality of digital beamformers, and configured to generate a combined channel comprising an aggregation of at least a portion of the encoded first plurality of data beams and at least a portion of the encoded second plurality of data beams.

Abstract: In some embodiments, an antenna module includes an antenna element having a first side and a second side opposite the first side; a spacer structure disposed at the second side of the antenna element and configured to define a cavity, the spacer structure configured to be physically and electrically couplable with a printed circuit board (PCB) of a receiver or a transmitter; and an amplifier located within the cavity. The first side comprises a radiating side of the antenna element.

Abstract: In embodiments, a power splitter/combiner includes a first electrically conductive trace included in a first layer; second and third electrically conductive traces included in a second layer; a first via electrically coupled to the first and second electrically conductive traces; and a second via electrically coupled to the first and third electrically conductive traces. A first portion of the first electrically conductive trace comprises a first port of the power splitter/combiner. A second portion of the first electrically conductive trace, the first via, and the second electrically conductive trace comprises a second port of the power splitter/combiner. A third portion of the first electrically conductive trace, the second via, and the third electrically conductive trace comprises a third port of the power splitter/combiner.

Abstract: In one embodiment of the present disclosure, a phased array antenna system includes a first portion carrying an antenna lattice including a plurality of antenna elements, wherein the plurality of antenna elements are arranged in a first configuration, a second portion carrying a beamformer lattice including a plurality of beamformer elements, wherein the plurality of beamformer elements are arranged in a second configuration different from the first configuration, and a third portion disposed between the first portion and the second portion carrying at least a portion of a mapping including a first plurality of mapping traces on a first surface providing at least a portion of the electrical connection between the plurality of antenna elements and the plurality of beamformer elements, wherein each of the plurality of antenna elements are electrically coupled to one of the plurality of beamformer elements.

Abstract: A method of communication with a non-GEO constellation of satellites, includes providing an Earth-based terminal configured for communication with a satellite constellation, and establishing communication between the Earth-based terminal and a non-GEO constellation of satellites, the non-GEO constellation of satellites including a first plurality of satellites orbiting at a first inclination, wherein each of the satellites in the first plurality of satellites is in a discrete planar orbit to form a first snake of satellites, the first snake of satellites including adjacent satellites in adjacent orbits having adjacent RAAN (Right Ascension of the Ascending Node), wherein the Earth-based terminal is positioned and configured for continuous communication with at least one satellite from the non-GEO constellation of satellites.

Abstract: In an embodiment, a receiver included in a communications system includes a channel extractor configured to segregate a received signal into a plurality of channel signals, wherein the plurality of channel signals includes a plurality of data signals; a plurality of phase shifters electrically coupled to the channel extractor and configured to decode each data signal of the plurality of data signals with a respective phase; and a plurality of time delay filters electrically coupled to the plurality of phase shifters and configured to decode each data signal of the plurality of data signals with a respective time delay, wherein the plurality of time delay filters outputs each subset of the plurality of data signals in a respective channel of the plurality of channels.

Abstract: In an embodiment, an apparatus includes a first plurality of digital beamformers associated with a first channel; a second plurality of digital beamformers associated with a second channel different from the first channel; a channel combiner, electrically coupled to the first and second plurality of digital beamformers, and configured to generate a combined channel comprising an aggregation of the encoded first plurality of data beams and the encoded second plurality of data beams, wherein the combined channel has a bandwidth that is a function of a bandwidth of one or both of the first or second channel; and a radio frequency (RF) transmission section, electrically coupled to the channel combiner, and configured to generate an output signal to be provided to a transmitting antenna based on the combined channel, wherein the RF transmission section includes a digital-to-analog converter (DAC) and a mixer.

Abstract: In an embodiment, an apparatus included in a communications system includes a transmit section including a first baseband section and a first radio frequency (RF) section, wherein the transmit section is configured to receive a calibration signal, the first RF section is configured to generate a RF calibration signal based on the calibration signal, and wherein the calibration signal comprises an orthogonal code based signal; and a receive section configured to receive the RF calibration signal over-the-air, wherein the receive section includes a second RF section and a calibration section, wherein the second RF section is configured to generate a received calibration signal based on the RF calibration signal, and wherein the calibration section is configured to determine one or more of gain, baseband delay, or RF delay compensation values, based on the inputs, to calibrate the transmit section.

Abstract: A phased array antenna system configured for communication with a satellite that emits or receives radio frequency (RF) signals travels in a first direction, the antenna system includes a phased array antenna including a plurality of antenna elements distributed in a plurality of M columns oriented in the first direction and a plurality of N rows extending in a second direction normal to the first direction, and a plurality of fixed phase shifters aligned for phase offsets between antenna elements in the first direction and a gain-enhancement system configured for gain enhancement in the second direction of radio frequency signals received by and emitted from the phased array antenna.

Abstract: In an embodiment, an apparatus includes a first integrated circuit (IC) chip configured to receive a timing signal and a reference clock signal; a second IC chip configured to receive the timing signal from the first IC chip and the reference clock signal; and a third IC chip configured to receive the timing signal from the second IC chip and the reference clock signal. The second IC chip is electrically coupled between the first and third IC chips. The first, second, and third IC chips are configured to generate respective first, second, and third reference time signals based on the timing signal and the reference clock signal. Each of the first, second, and third reference time signals is associated with a count of a number of cycles of the reference clock signal starting from a same particular cycle of the reference clock signal.

Abstract: In an embodiment, a device is included in a communications system, the device including a plurality of antenna elements configured in a phased array antenna; a plurality of integrated circuit (IC) chips, wherein each IC chip of the plurality of IC chips is associated with a respective subset of antenna elements of the plurality of antenna elements, and wherein, for each IC chip of the plurality of IC chips, the associated subset of antenna elements is used for transmitting and receiving radio frequency (RF) signals by the IC chip; and a local oscillator configured to generate a common local oscillator signal and provide the common local oscillator signal to each IC chip of the plurality of IC chips.

Abstract: In one embodiment of the present disclosure, an antenna apparatus includes a housing assembly including a radome portion and a lower enclosure portion, wherein the radome portion and lower enclosure portion are couplable to form an inner compartment for housing antenna components of the antenna assembly, an antenna stack assembly disposed within the inner compartment, wherein the antenna stack assembly generates heat when in operation, and a heat transfer system within the inner compartment configured to facilitate the flow of heat toward the radome portion.

Abstract: In one embodiment of the present disclosure, an antenna assembly includes a plurality of layers defining an antenna assembly including a plurality of PCB layers and a plurality of non-PCB layers, the antenna assembly having a top surface and a bottom surface, and adhesive coupling between the PCB layers and the non-PCB layers.

Abstract: In one embodiment of the present disclosure, a housing assembly for an antenna apparatus includes a radome portion, a lower enclosure portion, and a fastener system configured for coupling the radome portion and the lower enclosure portion couplable to form an inner compartment for antenna components of an antenna assembly.