Abstract: The present invention stacks chip scale-packaged integrated circuits (CSPs) into modules that conserve PWB or other board surface area. In another aspect, the invention provides a lower capacitance memory expansion addressing system and method and preferably with the CSP stacked modules provided herein. In a preferred embodiment in accordance with the invention, a form standard is disposed between the flex circuitry and the IC package over which a portion of the flex circuitry is laid. The form standard provides a physical form that allows many of the varying package sizes found in the broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design. In a preferred embodiment, the form standard will be devised of heat transference material such as copper to improve thermal performance.
Type:
Application
Filed:
March 31, 2004
Publication date:
September 16, 2004
Applicant:
Staktek Grop, L.P.
Inventors:
Russell Rapport, James W. Cady, James Wilder, David L. Roper, James Douglas Wehrly, Jeff Buchle