Abstract: A wafer level chip scale package (WLCSP) with portions that have different thicknesses. A first passive surface of a die in the WLSCP includes a plurality of surfaces. The plurality of surfaces may include inclined surfaces or flat surfaces. Thicker portions of die, with more semiconductor material remaining are non-critical portions that increase a WLCSP's strength for further processing and handling after formation, and the thinner portions are critical portions that reduce a Coefficient of Thermal Expansion (CTE) mismatch between a WLCSP and a PCB.

Abstract: An integrated circuit die includes a semiconductor substrate, an interconnect layer including bonding pads, and a passivation layer covering the interconnect layer and including openings at the bonding pads. A conductive redistribution layer including conductive lines and conductive vias is supported by the passivation layer. An insulating layer covers the conductive redistribution layer and the passivation layer. Channels formed in an upper surface of the insulating layer delimit pedestal regions in the insulating layer. A through via extends from an upper surface of each pedestal region through the pedestal region and the insulating layer to reach and make contact with a portion of the conductive redistribution layer. A metal pad is formed at the upper surface of each pedestal region in contact with its associated through via. The metal pads for leads of a quad-flat no-lead (QFN) type package.

Abstract: A gas sensor is formed by a thin-film semiconductor metal-oxide gas sensing layer, with a thermally conductive and electrically-insulating layer in direct physical contact with a back of the gas sensing layer to carry the gas sensing layer. Sensing circuitry applies a voltage to the gas sensing layer and measures a current flowing through the gas sensing layer. The current flowing through the gas sensing layer is indicative of whether a gas under detection has been detected by the gas sensing layer, and serves to self-heat the gas sensing layer. A support structure extends from a substrate to make direct physical contact with and carry the thermally conductive and electrically insulating layer about a perimeter of a back face thereof, with the support structure shaped to form an air gap between the back of the thermally conductive and electrically insulating layer and a front of the substrate.

Abstract: A bonding pad for an integrated circuit is formed by a stack of bonding pad layers. A lower bonding pad layer is supported by a bonding pad support layer. A passivation layer extends over the lower bonding pad layer and includes a passivation opening at a portion of an upper surface of the lower bonding pad layer. An upper bonding pad layer rests on said passivation layer and in the passivation opening in contact with the lower bonding pad layer.

Abstract: A semiconductor package includes a die and a first lamination layer on the die with openings through the first lamination layer. A redistribution layer is on the first lamination layer and extends through the openings to the die. A plurality of conductive extensions are on the redistribution layer with each stud including a first surface on the redistribution layer, a second surface opposite to the first surface, and a sidewall between the first surface and the second surface. A second lamination layer is on the redistribution layer and the first lamination layer with the die encapsulated in molding compound. The second lamination layer is removed around the conductive extensions to expose the second surface and at least a portion of the sidewall of each stud to improve solder bond strength when mounting the package to a circuit board.

Abstract: A method for forming a molded proximity sensor with an optical resin lens and the structure formed thereby. A light sensor chip is placed on a substrate, such as a printed circuit board, and a diode, such as a laser diode, is positioned on top of the light sensor chip and electrically connected to a bonding pad on the light sensor chip. Transparent, optical resin in liquid form is applied as a drop over the light sensor array on the light sensor chip as well as over the light-emitting diode. After the optical resin is cured, a molding compound is applied to an entire assembly, after which the assembly is polished to expose the lenses and have a top surface flush with the top surface of the molding compound.

Abstract: A semiconductor device having a channel between active sections or portions of the device is disclosed. An elastic material, such as dielectric or a polymer, is deposited into the channel and cured to increase flexibility and thermal expansion properties of the semiconductor device. The elastic material reduces the thermal and mechanical mismatch between the semiconductor device and the substrate to which the semiconductor device is coupled in downstream processing to improve reliability. The semiconductor device may also include a plurality of channels formed transverse with respect to each other. Some of the channels extend all the way through the semiconductor device, while other channels extend only partially through the semiconductor device.

Abstract: A multi-chip package including a first integrated circuit and a second integrated circuit. The first integrated circuit includes a first side having a first conductive layer, a second side having a second conductive layer, and an edge, the first conductive layer coupled to the second conductive layer at a location adjacent to the edge. The second integrated circuit is coupled to the second conductive layer of the first integrated circuit.

Abstract: A semiconductor substrate includes: a base substrate layer doped with a first type dopant; a first epitaxial layer on the base substrate layer that has a first thickness and is doped with the first type dopant to provide a first resistivity; a second epitaxial layer on the first epitaxial layer that has a second thickness and is doped with the first type dopant to provide a second resistivity (less than the third resistivity); and a third epitaxial layer on the second epitaxial layer that has a third thickness and is doped with the first type dopant to provide a third resistivity (less than the second resistivity). An oxide field trench transistor includes a trench with insulated polygate and polysource regions extending into the semiconductor substrate and passing through the first doped region, the second doped region, the third epitaxial layer and partially into the second epitaxial layer.

Abstract: A proximity sensor includes a printed circuit board substrate, a semiconductor die, electrical connectors, a lens, a light emitting assembly, and an encapsulating layer. The semiconductor die is positioned over the printed circuit board substrate with its upper surface facing away from the printed circuit board substrate. Each of the electrical connectors is in electrical communication with a contact pad of the semiconductor die and a respective contact pad of the printed circuit board substrate. The lens is positioned over a sensor area of the semiconductor die. The light emitting assembly includes a light emitting device having a light emitting area, a lens positioned over the light emitting area, and contact pads facing the printed circuit board substrate. The encapsulating layer is positioned on the printed circuit board substrate, at least one of the electrical connectors, the semiconductor die, the lens, and the light emitting assembly.

Abstract: A method of testing an integrated circuit die (IC) for cracks includes performing an assembly process on a wafer including multiple ICs including: lowering a tip of a first manipulator arm to contact and pick up a given IC, flipping the given IC such that a surface of the IC facing the wafer faces a different direction, and transferring the IC to a tip of a second manipulator arm, applying pressure from the second manipulator arm to the given IC such that pogo pins extending from the tip of the first manipulator arm make electrical contact with conductive areas of the IC for connection to a crack detector on the IC, and performing a conductivity test on the crack detector using the pogo pins. If the conductivity test indicates a lack of presence of a crack, then the second manipulator arm is used to continue processing of the given IC.

Abstract: The present disclosure is directed to a wafer level chip scale package (WLCSP) with various combinations of contacts and Under Bump Metallizations (UBMs) having different structures and different amounts solder coupled to the contacts and UBMs. Although the contacts have different structures and the volume of solder differs, the total standoff height along the WLCSP remains substantially the same. Each portion of solder coupled to each respective contact and UBM includes a point furthest away from an active surface of a die of the WLCSP. Each point of each respective portion of solder is co-planar with each other respective point of the other respective portions of solder. Additionally, the contacts with various and different structures are positioned accordingly on the active surface of the die of the WLCSP.

Abstract: A multi-chip package including a first integrated circuit and a second integrated circuit. The first integrated circuit includes a first side having a first conductive layer, a second side having a second conductive layer, and an edge, the first conductive layer coupled to the second conductive layer at a location adjacent to the edge. The second integrated circuit is coupled to the second conductive layer of the first integrated circuit.

Abstract: A semiconductor device having a channel between active sections or portions of the device is disclosed. An elastic material, such as dielectric or a polymer, is deposited into the channel and cured to increase flexibility and thermal expansion properties of the semiconductor device. The elastic material reduces the thermal and mechanical mismatch between the semiconductor device and the substrate to which the semiconductor device is coupled in downstream processing to improve reliability. The semiconductor device may also include a plurality of channels formed transverse with respect to each other. Some of the channels extend all the way through the semiconductor device, while other channels extend only partially through the semiconductor device.

Abstract: The present disclosure is directed to embodiments of sensor package including a doped resin on respective surfaces and sidewalls of a transparent portion, a sensor die, and a support structure extending from the transparent portion to the sensor die. The support structure suspends the transparent portion over a sensor of the sensor die. The doped resin is doped with an additive material, and the additive material is activated by exposing the doped resin to a laser. The doped resin is exposed to the laser forming conductive layers extending along the doped resin for providing electrical connections within the sensor package and to electronic components external to the embodiments of the sensor die packages. The conductive layers are at least partially covered by a non-conductive layer.

Abstract: Described herein is a method of forming wafer-level packages from a wafer. The method includes adhesively attaching front sides of first integrated circuits within the wafer to back sides of second integrated circuits such that pads on the front sides of the first integrated circuits and pads on front sides of the second integrated circuits are exposed. The method further includes forming a laser direct structuring (LDS) activatable layer over the front sides of the first integrated circuits and the second integrated circuits and over edges of the second integrated circuits, and forming desired patterns of structured areas within the LDS activatable layer. The method additionally includes metallizing the desired patterns of structured areas to form conductive areas within the LDS activatable layer.

Abstract: Provided is a sensor package with an integrated circuit embedded in a substrate and a sensor die on the substrate. The substrate includes a molding compound that has additives configured to respond to a laser. The integrated circuit is embedded in the molding compound. An opening is through the substrate and is aligned with the sensor die. A lid covers the sensor die and the substrate, forming a cavity. At least one trace is formed on a first surface of the substrate, on an internal sidewall of the opening and on a second surface of the substrate with a laser direct structuring process.

Abstract: A semiconductor package having a die with a sidewall protected by molding compound, and methods of forming the same are disclosed. The package includes a die with a first surface opposite a second surface and sidewalls extending between the first and second surfaces. A redistribution layer is formed on the first surface of each die. An area of the first surface of the die is greater than an area of the redistribution layer, such that a portion of the first surface of the die is exposed. When molding compound is formed over the die and the redistribution layer to form a semiconductor package, the molding compound is on the first surface of the die between an outer edge of the redistribution layer and an outer edge of the first surface. The molding compound is also on the sidewalls of the die, which provides protection against chipping or cracking during transport.

Abstract: The present disclosure is directed to a gas sensor that includes an active sensor area that is exposed to an environment for detection of elements. The gas sensor may be an air quality sensor that can be fixed in position or carried by a user. The gas sensor includes a heater formed above chamber. The gas sensor includes an active sensor layer above the heater that forms the active sensor area. The gas sensor can include a passive conductive layer, such as a hotplate that further conducts and distributes heat from the heater to the active sensor area. The heater can include a plurality of extensions. The heater can also include a first conductive layer and a second conductive layer on the first conductive layer where the second conductive layer includes a plurality of openings to increase an amount of heat and to more evenly distribute heat from the heater to the active sensor area.

Abstract: An electronic device includes a support substrate to which a first electronic chip and a second electronic chip are mounted in a position situated on top of one another. First electrical connection elements are interposed between the first electronic chip and the support substrate. Second electrical connection elements are interposed between the second electronic chip and the support substrate and are situated at a distance from a periphery of the first electronic chip. Third electrical connection elements are interposed between the first electronic chip and the second electronic chip.