Abstract: A method of automatically determining firing priority in a plurality of rules. The method includes the steps of determining a level of dependency of each rule; and generating a hierarchy of rules in response to the level of dependency of each rule, wherein the firing priority corresponds to the hierarchy of rules. In another embodiment, the method further includes the step of determining if the hierarchy results in an inconsistency. In another embodiment, the method further comprises the step of determining if the hierarchy results in a loop. In yet another embodiment, the step of determining a level of dependency of each rule is performed in response to an initial event. In one embodiment the method includes the step of determining if there are reciprocal dependencies between any two rules in the set of rules.

Abstract: A method for tracking modified pages is provided. The method is utilized in a fault-tolerant system, the fault-tolerant system comprising a first computer system and a second computer system. The method involves copying a memory from the first computer system to the second computer system at a first point in time. Between the first point in time and a second point in time, a scheduler tracks processes that execute on the first computer system in a harvest list. After the second point in time, the processes that made changes to the memory between the first and second points in time are retrieved. The changes to the memory are then copied to the second computer system and the changes are applied to the memory of the second computer system.

Abstract: Methods and systems are provided by which a computer system, and in particular, a lockstep fault-tolerant computer system, may be split into a plurality of independently operational subsystems. Each subsystem may be examined, managed or upgraded by an administrator while the overall computer system continues to service end-users. Finally, the separate subsystems may be merged in an efficient fashion and fault-tolerant operation will resume upon the combined system.

Abstract: A method of automatically determining firing priority in a plurality of rules. The method includes the steps of determining a level of dependency of each rule; and generating a hierarchy of rules in response to the level of dependency of each rule, wherein the firing priority corresponds to the hierarchy of rules. In another embodiment, the method further includes the step of determining if the hierarchy results in an inconsistency. In another embodiment, the method further comprises the step of determining if the hierarchy results in a loop. In yet another embodiment, the step of determining a level of dependency of each rule is performed in response to an initial event.

Abstract: A transparent high-availability solution utilizing virtualization technology is presented. A cluster environment and management thereof is implemented through an automated installation and setup procedure resulting in a cluster acting as a single system. The cluster is setup in an isolated virtual machine on each of a number of physical nodes of the system. Customer applications are run within separate application virtual machines on one physical node at a time and are run independently and unaware of their configuration as part of a high-availability cluster. Upon detection of a failure, traffic is rerouted through a redundant node and the application virtual machines are migrated from the failing node to another node using live migration techniques.

Abstract: An apparatus and method for fault-tolerant and spread spectrum clocking. In one embodiment a master clock synthesizer circuit generates an output clock signal of varying frequency within a predetermined range of frequencies. A slave clock synthesizer circuit is provided to track the output clock signal generated by the master clock synthesizer circuit. If the master clock synthesizer circuit fails or generates an invalid output clock signal, the slave clock synthesizer circuit takes over and functions as the master clock synthesizer circuit. In one embodiment a method of fault-tolerant spread spectrum clocking includes generating a first digital data stream; receiving the first digital data stream, a first input reference signal and a first clock signal in a master clock synthesizer circuit; generating an first output clock signal of varying frequency by the master clock synthesizer circuit in response to the first digital data stream and the first clock signal.

Abstract: The invention relates to checkpointing memory. In one aspect, a processor directs a write request to a location within a first memory. The write request includes at least a data payload and an address identifying the location. An inspection module identifies the write request before it reaches the first memory, copies at least the address identifying the location, and forwards the write request to a memory agent within the first memory.

Abstract: A system is provided for rapidly synchronizing two or more processing elements in a fault-tolerant computing system. Embodiments of this system allow for the rapid synchronization of two processing elements through partial copies of the contents of memory associate with each processing element.

Abstract: A system is provided for rapidly synchronizing two or more processing elements in a fault-tolerant computing system. Embodiments of this system allow for the rapid synchronization of two processing elements through partial copies of the contents of memory associate with each processing element.

Abstract: An improved method and apparatus is provided for checkpointing and rollback of network operations. In one embodiment the method includes varying the checkpoint interval in response to a packet deferred timer and buffering data packets that would affect the states of other network devices in a deferred packets queue. The method further generates an outbound packet for transmission to a remote system, buffers the outbound packet until one of a checkpoint or rollback condition is met and varies a checkpoint interval in response to network load. In another embodiment the apparatus includes a transmitter to send an outgoing packet to a remote system, a deferred transmit queue connected to the transmitter and a deferred packet timer that is configured to vary a checkpoint interval based on a predetermined value.

Abstract: A system is provided for rapidly synchronizing two or more processing elements in a fault-tolerant computing system. Embodiments of this system allow for the rapid synchronization of two processing elements through partial copies of the contents of memory associate with each processing element.

Abstract: An apparatus and method is provided for translating addresses and rerouting them to preferably one of at least two destinations. This is accomplished through the use of a memory unit and a combination of logic operation units that essentially operate as a look-up translation table configurable by software. The apparatus includes an input to receive an address of a certain length and a memory unit that is adapted to receive a portion of the input address and output another address of a predetermined length which is mapped to the input. The method includes receiving input addresses of a certain length and performing an operation on a portion of the input address to determine its destination.

Abstract: Methods and systems are provided by which a computer system, and in particular, a lockstep fault-tolerant computer system, may be split into a plurality of independently operational subsystems. Each subsystem may be examined, managed or upgraded by an administrator while the overall computer system continues to service end-users. Finally, the separate subsystems may be merged in an efficient fashion and fault-tolerant operation will resume upon the combined system.

Abstract: A method and a system for recovering a computing system's hardware state. In one embodiment the method includes simulating a removal of a hardware device from a bus of the computing system, simulating the replacement of the hardware device onto the bus and executing a configuration program for the computing system. In another embodiment the removal of the hardware device from the bus is simulated following a detection of a fault in the computing system. In another embodiment the simulating of the removal of the hardware device from the bus includes modifying a list of hardware devices connected to the bus by removing the hardware device from the list.

Abstract: The invention relates to checkpointing a disk and/or memory. In one aspect, a first computing device receives a write request that includes a data payload. The first computing device then transmits a copy of the received write request to a second computing device and writes the data payload to a disk. The copy of the write request is queued at a queue on the second computing device until the next checkpoint is initiated or a fault is detected at the first computing device. In another aspect, a processor directs a write request to a location within a first memory. The write request includes at least a data payload and an address identifying the location. An inspection module identifies the write request before it reaches the first memory, copies at least the address identifying the location, and forwards the write request to a memory agent within the first memory.

Abstract: The invention includes a method for determining whether a node in a non-recursive network can be removed. The method includes the steps of executing a reachability algorithm for a resource of a system upon initialization of the system. The resource is accessible to the system upon the initialization. A safe to pull manager evaluates the reachability algorithm for each node situated on the network to determine whether the node can be removed without interrupting resource accessibility to the system.

Abstract: The invention relates to computer systems, and more specifically to a method and apparatus for inserting and storing server units in a rack-mounted computer. In one embodiment, the system includes a cabinet comprising a plurality of rails. The system also includes a rack that is coupled to the rails for receiving the server units. A mounting latch is pivotally coupled to the server unit, the mounting latch including a fastener that is securable to the rails.

Abstract: A highly-available computer system is provided. The system includes at least two computer subsystems, each including memory, a local storage device and an embedded operating system. The system also includes a communication link between the two subsystems. Upon the initialization of the two computer subsystems, the embedded operating systems communicate via the communications link and designate one of the two subsystems as dominant. The dominant subsystem then loads a primary operating system. As write operations are sent to the local storage device of the dominant system, the write operations are mirrored over the communications link to each subservient system's local storage device. In the event of a failure of the dominant system, a subservient system will automatically become dominant and continue providing services to end-users.

Abstract: Systems and methods are disclosed for facilitating synchronous communications over an asynchronous communications link. Specifically, embodiments of the claimed invention provide systems and methods for transmitting high-speed signals while maintaining lock-step determinism using remote clock phase adjustments. Embodiments of the claimed invention also provide systems and methods for maintaining determinism through the use of synchronized time slice counters within the various components.

Abstract: The invention relates to checkpointing memory. In one aspect, a processor directs a write request to a location within a first memory. The write request includes at least a data payload and an address identifying the location. An inspection module identifies the write request before it reaches the first memory, copies at least the address identifying the location, and forwards the write request to a memory agent within the first memory.