Patents Assigned to SUMITOMO ELECTRIC INDUSTIES, LTD.
  • Patent number: 11283200
    Abstract: An electric wire with a terminal, includes an insulated wire which includes a core wire and an insulating layer covering the core wire, a seal member which is disposed in one end portion of the insulated wire and covers the insulating layer, a metal terminal which extends from the end portion of the insulated wire and is connected to the core wire and a waterproof resin portion which covers from a seal member covering part of the insulated wire to an electrical connection part of the metal terminal. The insulating layer contains an olefin resin. The waterproof resin portion contains a polyester, a polyamide, an ethylene-vinyl acetate copolymer, or a mixed resin thereof. The seal member includes an inner layer containing an ethylene resin and an outer layer laminated on the inner layer and containing a polyester, a polyamide, an ethylene-vinyl acetate copolymer, or a mixed resin thereof.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: March 22, 2022
    Assignees: Sumitomo Electric Industies, Ltd., AutoNetworks Technologies, Ltd., Sumitomo Wiring Systems, Ltd.
    Inventors: Shigeyuki Tanaka, Taro Fujita, Shinya Nishikawa, Kazuo Nakashima, Tetsuya Nakamura
  • Patent number: 8964809
    Abstract: A semiconductor optical integrated device includes a substrate having a main surface with a first and second regions arranged along a waveguiding direction; a gain region including a first cladding layer, an active layer, and a second cladding layer arranged on the first region of the main surface; and a wavelength control region including a third cladding layer, an optical waveguide layer, and a fourth cladding layer arranged on the second region of the main surface and including a heater arranged along the optical waveguide layer. The substrate includes a through hole extending from a back surface of the substrate in the thickness direction and reaching the first region. A metal member is arranged in the through hole. The metal member extends from the back surface of the substrate in the thickness direction and is in contact with the first cladding layer.
    Type: Grant
    Filed: August 29, 2012
    Date of Patent: February 24, 2015
    Assignee: Sumitomo Electric Industies, Ltd
    Inventors: Yoshihiro Yoneda, Masaki Yanagisawa, Kenji Koyama, Hirohiko Kobayashi, Kenji Hiratsuka
  • Patent number: 8962365
    Abstract: The present method of manufacturing a GaN-based film includes the steps of preparing a composite substrate including a support substrate dissoluble in hydrofluoric acid and a single crystal film arranged on a side of a main surface of the support substrate, a coefficient of thermal expansion in the main surface of the support substrate being more than 0.8 time and less than 1.2 times as high as a coefficient of thermal expansion of GaN crystal, forming a GaN-based film on a main surface of the single crystal film arranged on the side of the main surface of the support substrate, and removing the support substrate by dissolving the support substrate in hydrofluoric acid. Thus, the method of manufacturing a GaN-based film capable of efficiently obtaining a GaN-based film having a large main surface area, less warpage, and good crystallinity, as well as a composite substrate used therefor are provided.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: February 24, 2015
    Assignee: Sumitomo Electric Industies, Ltd.
    Inventors: Issei Satoh, Yuki Seki, Koji Uematsu, Yoshiyuki Yamamoto, Hideki Matsubara, Shinsuke Fujiwara, Masashi Yoshimura
  • Patent number: 8613802
    Abstract: Affords nitride semiconductor crystal manufacturing apparatuses that are durable and that are for manufacturing nitride semiconductor crystal in which the immixing of impurities from outside the crucible is kept under control, and makes methods for manufacturing such nitride semiconductor crystal, and the nitride semiconductor crystal itself, available. A nitride semiconductor crystal manufacturing apparatus (100) is furnished with a crucible (101), a heating unit (125), and a covering component (110). The crucible (101) is where, interiorly, source material (17) is disposed. The heating unit (125) is disposed about the outer periphery of the crucible (101), where it heats the crucible (101) interior. The covering component (110) is arranged in between the crucible (101) and the heating unit (125).
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: December 24, 2013
    Assignee: Sumitomo Electric Industies, Ltd.
    Inventors: Issei Satoh, Michimasa Miyanaga, Yoshiyuki Yamamoto, Hideaki Nakahata
  • Publication number: 20040187789
    Abstract: Wafer holder for semiconductor manufacturing and semiconductor manufacturing device in which the holder is installed, the wafer holder having a wafer-carrying surface, wherein the isothermal rating of its wafer-carrying surface is enhanced. In the wafer holder having a wafer-carrying surface, a shaft that supports the wafer holder is joined to the wafer holder; by making the in-shaft heat capacity of electrodes for supplying power to an electrical circuit formed either on a surface other than the wafer-carrying surface of the wafer holder, or else inside it, 10% or less of the heat capacity of the region of wafer holder that corresponds to the shaft, the temperature distribution in the wafer surface can be brought within an isothermal rating of ±1.0%. The electrical circuit formed in the wafer holder is preferably at least a resistive heating element.
    Type: Application
    Filed: June 27, 2003
    Publication date: September 30, 2004
    Applicant: SUMITOMO ELECTRIC INDUSTIES, LTD.
    Inventors: Masuhiro Natsuhara, Hirohiko Nakata, Manabu Hashikura