Abstract: A virtual core management system including one or more physical cores, a virtual core including a collection of logical states associated with the execution of a program, and a virtual core management component configured to map the virtual core to one of the one or more physical cores based upon power management considerations.
Type:
Grant
Filed:
October 31, 2007
Date of Patent:
September 24, 2013
Assignees:
Sun Microsystems, Inc., Sun Microsystems Technology Ltd.
Inventors:
Yu Qing Cheng, John Gregory Favor, Peter N. Glaskowsky, Carlos Puchol, Seungyoon Peter Song
Abstract: A virtual core management system including a physical core and a first virtual core including a collection of logical states associated with execution of a first program. The first virtual core is mapped to the physical core. The virtual core management system further includes a second virtual core including a collection of logical states associated with execution of a second program, and a virtual core management component configured to unmap the first virtual core from the physical core and map the second virtual core to the physical core in response to the virtual core management component detecting that the physical core is idle.
Type:
Grant
Filed:
October 31, 2007
Date of Patent:
July 17, 2012
Assignees:
Oracle America, Inc., Sun Microsystems Technology Ltd.
Inventors:
Yu Qing Cheng, John Gregory Favor, Peter N. Glaskowsky, Laurent R. Moll, Carlos Puchol, Joseph Rowlands, Seungyoon Peter Song
Abstract: A small and power-efficient buffer/mini-cache sources and sinks selected DMA accesses directed to a memory space included in a coherency domain of a microprocessor when cached data in the microprocessor is inaccessible due to any or all of the microprocessor being in a low-power state not supporting snooping. Satisfying the selected DMA accesses via the buffer/mini-cache enables reduced power consumption by allowing the microprocessor (or portion thereof) to remain in the low-power state. The buffer/mini-cache may be operated (temporarily) incoherently with respect to the cached data in the microprocessor and flushed before deactivation to synchronize with the cached data when the microprocessor (or portion thereof) transitions to a high-power state that enables snooping. Alternatively the buffer/mini-cache may be operated in a manner (incrementally) coherent with the cached data.
Type:
Grant
Filed:
February 9, 2006
Date of Patent:
August 12, 2008
Assignees:
Sun Microsystems, Inc., Sun Microsystems Technology LTD
Inventors:
Laurent R. Moll, Yu Qing Cheng, Peter N. Glaskowsky, Seungyoon Peter Song