Abstract: A computer readable storage medium including executable instructions for heuristics-based task scheduling. Instructions include receiving a first event notification associated with a first event, where the first event is determined from the first event notification. Instructions further include determining whether a predicate for an action is satisfied by the first event, where the action predicate, the action, and an action parameter are associated with a task object in a task pool. Instructions further include obtaining the action parameter when the action predicate is satisfied by the first event, where a priority is assigned using a heuristics policy to the task object based on the action parameter. Instructions further include inserting the task object into a task queue using the assigned priority. The action associated with the task object is performed by an execution thread. The performance of the action is a second event associated with a second event notification.

Abstract: A system and method of character input using a virtual keyboard, which may have a reduced number of keys. The virtual keyboard may be displayed on a touch screen and may include a plurality of keys. The virtual keyboard may have a plurality of keys, each key having a number of characters or symbols. Characters associated with a particular key may be selected through a series of related touch screen inputs.

Abstract: A memory device that includes multiple blocks of static random access memory (SRAM), which each have a standby mode and an active operating mode, is described. During the active operating mode, a selection circuit couples a higher voltage from a first power-signal line and a power-supply circuit to a given block of SRAM, and during the standby mode the selection circuit couples a lower voltage from a second power-signal line to the given block of SRAM. Note that a regulator circuit regulates the lower voltage on the second power-signal line by selectively opening or closing a first switch between the first power-signal line and the second power-signal line. Furthermore, a recycling circuit selectively opens a second switch between the first switch and the first power-signal line when the block of SRAM transitions from the active operating mode to the standby mode, thereby transferring charge from the block of SRAM to other blocks of SRAM.

Abstract: Some embodiments of the present invention provide a system that analyzes data from a computer system. During operation, the system obtains the sensor data from a component in the computer system using a set of sensors. Next, the system transmits the sensor data to a microcontroller unit (MCU) coupled to the sensors and stores the sensor data in internal memory of the MCU. Finally, the system assesses the integrity of the component by analyzing the sensor data using a pattern-recognition apparatus in the MCU.

Abstract: Some embodiments provide a system that analyzes telemetry data from a monitored system. During operation, the system obtains the telemetry data as a set of telemetric signals from the monitored system and groups the telemetry data into one or more clusters of correlated telemetric signals from the telemetric signals. Next, the system increases a bandwidth associated with monitoring the telemetric signals. To increase the bandwidth, the system omits one or more of the correlated telemetric signals from each of the clusters during sampling of the telemetric signals and estimates the omitted correlated telemetric signals by applying a nonlinear, nonparametric regression technique to the sampled telemetric signals.

Abstract: A heat sink for use with a heat generating component includes a molded cooling block including a molded cooling passage for receiving a cooling medium. The cooling block is configured to be positioned in sufficient heat transfer relationship with respect to the heat generating component so that the cooling medium receives heat from the heat generating component.

Abstract: An optical connector is described. This optical connector spatially segregates optical coupling between an optical fiber and an optical component, which relaxes the associated mechanical-alignment requirements. In particular, the optical connector includes an optical spreader component disposed on a substrate. This optical spreader component is optically coupled to the optical fiber at a first coupling region, and is configured to optically couple to the optical component at a second coupling region that is at a different location on the substrate than the first coupling region. Moreover, the first coupling region and the second coupling region are optically coupled by an optical waveguide.

Abstract: One embodiment provides a system that protects translated guest program code in a virtual machine that supports self-modifying program code. While executing a guest program in the virtual machine, the system uses a guest shadow page table associated with the guest program and the virtual machine to map a virtual memory page for the guest program to a physical memory page on the host computing device. The system then uses a dynamic compiler to translate guest program code in the virtual memory page into translated guest program code (e.g., native program instructions for the computing device). During compilation, the dynamic compiler stores in a compiler shadow page table and the guest shadow page table information that tracks whether the guest program code in the virtual memory page has been translated. The compiler subsequently uses the information stored in the guest shadow page table to detect attempts to modify the contents of the virtual memory page.

Abstract: One embodiment provides a system that facilitates the execution of a transaction for a program in a hardware-supported transactional memory system. During operation, the system records a failure state of the transaction during execution of the transaction using hardware transactional memory mechanisms. Next, the system detects a transaction failure associated with the transaction. Finally, the system provides an advice state associated with the recorded failure state to the program to facilitate a response to the transaction failure by the program.

Abstract: One embodiment provides a system that analyzes a target electromagnetic signal radiating from a monitored system. During operation, the system monitors the target electromagnetic signal using a set of antennas to obtain a set of received target electromagnetic signals from the monitored system. Next, the system calculates a weighted mean of the received target electromagnetic signals using a first pattern-recognition model. The system then subtracts the received target electromagnetic signals from the weighted mean of the received target electromagnetic signals to obtain a set of noise-reduced signals for the monitored system. Finally, the system assesses the integrity of the monitored system by analyzing the noise-reduced signals using a second pattern-recognition model.

Abstract: Some embodiments of the present invention provide a system that can be reconfigured to provide error detection and correction after a failure of a memory component in a memory system. During operation, the system accesses a block of data from the memory system, wherein each block of data in the memory system includes an array of bits logically organized into R rows and C columns, including two checkbit columns containing checkbits, and C-2 data-bit columns containing data bits, wherein each column is stored in a different memory component, and wherein the checkbits are generated from the data bits to provide block-level detection and correction for a failed memory component. Next, upon examining the block of data, the system determines that a specific memory component in the memory system has failed.

Abstract: A computer readable storage medium including executable instructions for managing a task. Instructions include receiving a request. Instructions further include determining a task corresponding with the request using a request-to-task mapping. Instructions include obtaining a task entry corresponding with the task from a task store, where the task entry associates the task with an action and a predicate for performing the action. Instructions further include creating a task object in a task pool using the task entry. Instructions further include receiving an event notification at the task engine, where the event notification is associated with an event. Instructions further include determining whether the predicate for performing the action is satisfied by the event. Instructions further placing the task object in a task queue when the predicate for performing the action is satisfied by the event.

Abstract: A system for characterizing vibration of a rack structure having at least one hard disk drive disposed therein and a vibration exciter operatively associated with the rack structure includes one or more computers. The one or more computers are configured to command the vibration exciter to provide vibration input to the rack structure and to command a plurality of reads from the at least one hard disk drive such that, for each of the plurality of reads, data stored on the at least one hard disk drive is retrieved from the at least one hard disk drive. The one or more computers are also configured to obtain read rate information related to the plurality of reads and to identify at least one resonant frequency of the rack structure based on the read rate information.

Abstract: A method for transmitting packets, including forwarding a first set of upstream packets and a first set of local packets by inserting at least one of the first set of local packets between subsets of the first set of upstream packets according to a first insertion rate; calculating a second insertion rate after forwarding a predetermined number of upstream packets generated by a single upstream source, by dividing a cardinality of the first set of upstream packets by a greatest common divisor of the predetermined number and the cardinality of the first set of upstream packets; and forwarding a second set of upstream packets and a second set of local packets from the local switch to the downstream switch by inserting at least one of the second set of local packets between subsets of the second set of upstream packets according to the second insertion rate.

Abstract: The described embodiments provide a circuit that can be configured as a pulse generator or as an oscillator. The circuit includes a pulse generator circuit and a test circuit that is coupled to the pulse generator circuit. In the described embodiments, an disable signal is coupled to the test circuit. When the disable signal is asserted, the test circuit is disabled, and the pulse generator circuit outputs pulses of a predetermined duration. In contrast, when the disable signal is deasserted, the test circuit is enabled, and the pulse generator circuit outputs an oscillating signal.

Abstract: A single-chip module (SCM) and a multi-chip module (MCM) that includes at least two instances of the SCM are described. The SCM includes a pad disposed on a substrate. This pad has a top surface that includes a pattern of features. A given feature in the pattern of features has a height that extends above a minimum thickness of the pad, thereby increasing a capacitance associated with the pad relative to a configuration in which the top surface is planar. Furthermore, pads disposed on the two instances of the SCM in the MCM may each have a corresponding pattern of features that increases the capacitive coupling between the pads relative to a configuration in which the top surfaces of either or both of the pads are planar. Note that the pads may be aligned such that features in the patterns of features on these pads are interdigited with each other.

Abstract: Some embodiments of the present invention provide a system for receiving packets on a multi-threaded computing device which uses a memory-buffer-usage scorecard (MBUS) to enable multiple hardware threads to share a common pool of memory buffers. During operation, the system can identify a memory-descriptor location for posting a memory descriptor for a memory buffer. Next, the system can post the memory descriptor for the memory buffer at the memory-descriptor location. The system can then update the MBUS to indicate that the memory buffer is in use. Next, the system can store a packet in the memory buffer, and post a completion descriptor in a completion-descriptor location to indicate that the packet is ready to be processed. If the completion-descriptor indicates that the memory buffer is ready to be reclaimed, the system can reclaim the memory buffer, and update the MBUS to indicate that the memory buffer has been reclaimed.

Abstract: A method including receiving a set of input data in a first matrix format. The method further includes compressing the set of input data to obtain a first set of compressed data in a second matrix format, where compressing the set of input data includes using a quantization equation, the quantization equation including Yq(i,j)=[(Y(i,j)+offset)<<n]/qs, where Yq(i,j) represents a coefficient in a matrix of the first set of compressed data having a coordinate (i,j), Y(i,j) represents a coefficient in a matrix of the set of input data having the coordinate (i,j), offset is an integer, << is a first bit-wise shift operator, n is an integer, qs is a real number. The method also includes sending the first set of compressed data to a first destination.

Abstract: One embodiment provides a system that facilitates the execution of a transaction for a program in a hardware-supported transactional memory system. During operation, the system records a misspeculation indicator of the transaction during execution of the transaction using hardware transactional memory mechanisms. Next, the system detects a transaction failure associated with the transaction. Finally, the system provides the recorded misspeculation indicator to the program to facilitate a response to the transaction failure by the program.

Abstract: Some embodiments of the present invention provide a system for packet classification and spreading in a virtualized system. The system can use information in a packet's header to determine a destination system-image in the virtualized system, and a packet-spreading policy for the destination system-image. The system can determine a key using the information in a packet's header. Alternatively, the system can hash the information in the packet's header to obtain an index value. Next, the system can use the key or the index value to perform a lookup in a table which associates keys or index values with system images and/or packet-spreading policies. Once the destination system-image and the packet-spreading policy are determined, the system can deliver the packet to a thread on the destination system-image according to the packet-spreading policy.