Abstract: A line driver includes the following. A current replication unit replicates a reference current according to an input signal. A current mapping unit adjusts a number of P channel transistors connected in parallel and inside the current mapping unit according to control information, so as to amplify the reference current according to a magnification value. A first resistor is electrically connected between the current replication unit and a direct-current voltage. A second resistor is electrically connected to the current replication unit and the current mapping unit and generates an output signal. A signal detection unit performs integration on a part of a difference between the input signal and the output signal, thereby generating an integration signal. A magnification control unit gradually adjusts magnification information related to a reference signal, and updates the control information by the magnification information when the reference signal is equal to the integration signal.

Abstract: A phase interpolation circuit including a first multiplexer, a second multiplexer, an interpolator and a duty-cycle repeater is provided. The first multiplexer receives a plurality of even order signals. The second multiplexer receives a plurality of odd order signals. The interpolator receives a first reference signal composed of one of the even order signals through the first multiplexer, and receives a second reference signal composed of one of the odd order signals through the second multiplexer. The interpolator divides a phase difference between the first reference signal and the second reference signal into a plurality of sub-phases according to a digital control signal, and selects one of the sub-phases to generate a differential input signal. The duty-cycle repeater adjusts the duty cycle of the differential input signal and accordingly generates a differential output signal with 50% duty cycle.

Abstract: A data recovery device including a filter, a tilt detection unit, a tilt cancellation unit and a data conversion unit is provided. The filter filters a radio-frequency data stream to generate an original data stream. The tilt detection unit synthesizes a tangential push-pull data stream by employing a first to a fourth data streams, and generates a tilt direction signal according to symmetry of a curve composed by the tangential push-pull data stream. The tilt cancellation unit detects a plurality of rising areas and falling areas of the original data stream, and reconstructs a plurality of data points corresponding to the rising areas or falling areas in the original data stream so as to generate a tilt repair data stream. The data conversion unit recovers the tilt repair data stream to a modulation signal.

Abstract: In an image processing system for a liquid crystal display a frame converter receives an original frame signal and produces a double frequency frame signal. A high pass filter performs a high pass filtering on the double frequency frame signal and produces a high pass double frequency frame signal. A delay device performs a delay operation on the double frequency frame signal and produces a delayed double frequency frame signal. A local contrast measurement device measures a contrast of the double frame signal and produces a local contrast signal. A high frequency gain device performs a gain adjustment on the high pass double frequency frame signal based on the local contrast signal and produces a gained high pass double frequency frame signal. A mixer is employed to mix the gained high pass double frequency frame signal and the delayed double frequency frame signal and produce an output frame signal.

Abstract: In a memory test system with advance features for completed memory system, the hardware components are independently configured to generate versatile test patterns for performing a programmable-loading test, a real case test, and a write-feedback test. The write-feedback test is employed to independently test a memory controller which is embedded in an integrated circuit without communicating with the external SDRAM. In the integrated circuit verification stage, the memory test system supports for analyzing and distinguishing the problems inside or outside of the integrated circuit, and testing individual write and read commands.

Abstract: A teletext decoder is provided which is suitable for decoding a packet of teletext signal to generate a teletext. The teletext decoder includes an error judgment device for judging the accuracy of a plurality of sliced bits, and correcting an error occurrence bit in the sliced bits on the basis of a plurality of sampling points and a slicer level when the plurality of sliced bits are incorrect.

Abstract: A phase interpolation circuit including a first multiplexer, a second multiplexer, an interpolator and a duty-cycle repeater is provided. The first multiplexer receives a plurality of even order signals. The second multiplexer receives a plurality of odd order signals. The interpolator receives a first reference signal composed of one of the even order signals through the first multiplexer, and receives a second reference signal composed of one of the odd order signals through the second multiplexer. The interpolator divides a phase difference between the first reference signal and the second reference signal into a plurality of sub-phases according to a digital control signal, and selects one of the sub-phases to generate a differential input signal. The duty-cycle repeater adjusts the duty cycle of the differential input signal and accordingly generates a differential output signal with 50% duty cycle.

Abstract: A progressive JPEG image decoding method is provided. In the decoding method, a non-zero history table and a sign table of each variable length decoding (VLD) result are recorded and used as a reference for decoding the next scan layer. The decoded coefficients are no longer directly stored in a memory so as to save the memory space. Accordingly, an image can be decoded and displayed correctly even with limited memory space.

Abstract: The present invention discloses a method and an apparatus for compensating astigmatism in an optical storage system. Firstly, the optical storage system focuses on an optical disc and proceeds track seeking. While track seeking, the astigmatism compensator continues adjusting and an astigmatism index signal is also measured. At last, an optimal astigmatism compensated value of the astigmatism compensator is acquired based on the measured result of the astigmatism index signal.

Abstract: A temporal vector processing device includes a motion vector estimation device for performing a motion estimation on a first pixel to generate a first motion vector. A motion vector compensation device performs a motion vector compensation on the first pixel based on the first motion vector to obtain a second pixel. A buffer temporarily stores motion vectors of the pixels of the image. A motion vector determination device determines whether a second motion vector is stored in the buffer at a corresponding storage location of the second pixel. In determining that the second motion vector is stored in the buffer at the corresponding storage location of the second pixel, the corresponding storage location of the second pixel in the buffer is updated based on a determination mechanism, and otherwise the first motion vector is directly stored in the buffer at the corresponding storage location of the second pixel.

Abstract: A circuit substrate includes a first pair of ground lines, a second pair of ground lines, a plurality of first connection lines, a plurality of second connection lines and a plurality of conductive pillars. The first and second pairs of ground lines are located on first and second surfaces of the substrate, respectively. The pillars are located in the substrate and vertically conducted between the first pair of ground lines and the second connection lines and between the second pair of ground lines and the first connection lines, and the first and second pairs of ground lines are conducted, so that a 3-D grounding circuit loop is formed. Moreover, a first pair of signal lines is disposed between the first connection lines for grounding and a second pair of signal lines is disposed between the second connection lines for grounding to get a better signal integrity.

Abstract: A method for determining an optimal combination of focus bias and spherical aberration compensating value (SA value) in an optical disc drive is provided. Firstly, a first focus bias is set, the SA values are adjusted and the corresponding tracking error signal values are measured. Second-order-approximation is performed to obtain a first maximum value of tracking error signal. Secondly, a second focus bias is set, the SA values are adjusted and the corresponding tracking error signal values are measured. Second-order-approximation is performed to obtain a second maximum value of tracking error signal. Thirdly, a third focus bias is set, the SA values are adjusted and the corresponding tracking error signal values are measured. Second-order-approximation is performed to obtain a third maximum value of the tracking error signal. The three maximum values are compared to obtain the optimal combination of focus bias and SA compensating value in the optical disc drive.

Abstract: A decoding apparatus for a high-density recording medium includes a demodulator, a long-distance code (LDC) processing module, a burst indicator subcode (BIS) processing module, an erasure code generator, and a decoder. The demodulator demodulates data from a high-density recording medium to obtain a demodulated data and a demodulation error flag. The LDC processing module and the BIS processing module deinterleave the demodulated data to respectively obtain an LDC data and a BIS data. The erasure code generator sets an erasure flag corresponding to the LDC data according to the demodulation error flag and the BIS error flag. The decoder decodes the LDC data according to the erasure flag. Further, the decoder decodes the BIS data to obtain the BIS error flag.

Abstract: An electronic apparatus for recording data using a non-volatile memory is provided. The electronic apparatus includes a non-volatile memory and a controller. The non-volatile memory stores a plurality of sets of playing information of the electronic apparatus. The controller is coupled to the non-volatile memory for receiving an input data and transforming a data structure of the input data into a bitmapping data structure. The controller includes a bitmapping module that is capable of transforming the input data into data having at least one bit but less than one byte in a bitmapping manner.

Abstract: An optical storage apparatus and a method for eliminating a write power transient thereof are provided. The method includes following steps. First, a target voltage level of a write voltage when next time the optical storage apparatus writes data is obtained. Then, a command value is updated by using the target voltage level according to a relationship between the command value and the write voltage. Next, the write voltage of the optical storage apparatus is pre-charged to the target voltage level according to the updated command value. Thereby, the write power transient of the optical storage apparatus can be eliminated.

Abstract: A general receiver device with adaptive filter includes an antenna, a low noise amplifier, a bandpass tracking filter, a single-ended-to-differential converter unit, a mixer, and an adaptive filter. The antenna receives an RF signal. The low noise amplifier amplifies the RF signal for generating an amplified RF signal. The band-pass tracking filter filters the amplified RF signal for generating a filtered RF signal. The single-ended-to-differential converter unit converts the filtered RF signal into a differential RF signal. The mixer receives a differential local oscillation signal and uses the differential local oscillation signal to down-convert the differential RF signal into a differential IF signal. The adaptive filter filters the differential IF signal for generating a filtered differential IF signal.

Abstract: An active and configurable filter device includes a first filter with a first quality factor, a second filter with a second quality factor and a third filter with a third quality factor. The first filter defines a bandwidth and central frequency of the filter device. The second filter is connected to the first filter for using the spectrums of the first filter and second filter to define a lower bound frequency and sharpness of the bandwidth of the filter device. The third filter is connected to the second filter for using the spectrums of the first filter and third filter to define an upper bound frequency and sharpness of the bandwidth of the filter device. The first quality factor is an adjustable value in a range of 5 to 15, and the second and the third quality factors are each an adjustable value greater than 15.

Abstract: A motion vector refining apparatus including a control unit, N filter units, and a mixer unit is provided. The control unit receives a motion estimation signal generated by a motion estimation unit and calculates a plurality of variation parameters according to a current motion vector, surrounding motion vectors, or a block matching error, so as to generate a control signal. The N filter units respectively calculate N filtering motion vectors by using N analysis processes. The mixer unit weights and mixes the filtering motion vectors according to the control signal to adjust and output a refined motion vector. Thereby, the motion vector refining apparatus can detect the edge of a moving object and mix filtering results of the analysis processes to adjust and refine motion vectors, so as to reduce image defects caused by a smooth processing.

Abstract: A temperature sensing device includes a bandgap voltage generator, N mirror current sources, a temperature voltage generator, and a temperature calculating unit. The mirror current sources mirror N mirror currents according to a positive temperature coefficient current. The temperature voltage generator sets the conducting number M of the mirror current sources based on a control signal, so as to generate a temperature voltage. The temperature calculating unit gradually counts the control signal and compares a potential of the temperature voltage with a potential of a reference voltage generated by the bandgap voltage generator after counting the control signal, so as to calculate and obtain temperature information. Thus, the temperature sensing device controls the conducting number M of the mirror current sources to generate the temperature voltage instead of applying serially-connected resistors, so as to reduce a circuit area of the temperature sensing device and reduce noise.

Abstract: A temperature detecting device includes a current source, a plurality of resistors, a binary counter, a multiplexer, a comparator and a control logic. The current source provides a PTAT current. The resistors provide m voltage signals with ascending or descending voltages. The binary counter generates a binary select signal having (n+1) bits. The m voltage signals are selectively outputted from the multiplexer as a multiplexer output signal according to the binary select signal, wherein 2n<m<2n+1. The comparator is used for comparing the multiplexer output signal with a reference voltage, thereby generating a comparing signal. The control logic is for issuing the start signal. If the comparing signal has a level change, the control logic controls the binary counter to record the binary select signal as a binary temperature signal. The reference voltage does not vary with temperature.