Abstract: A system for delivering USB data over a DiiVA network may include a USB host controller, at least one USB device, a first DiiVA device connected to the USB host controller through an upstream USB port, a second DiiVA device connected to the USB device through a downstream USB port; and a network configured to transfer data between the first DiiVA device and the second DiiVA device according to USB protocol through a DiiVA bi-directional hybrid link in the network. The network is responsive to the USB host controller to deliver contents for the USB protocol through at least one line state information packet and at least one USB data packet transmitted through the hybrid link between the upstream USB port and the downstream USB port.

Abstract: A digital video interface system and method for communicating digital video data from a source device to a sink device is provided, where the clock channel is used to transmit data as well as clock signals in a bi-directional, half-duplex manner using time division multiplexing. The digital video interface system comprises one or more data channels configured to transmit digital video data from the source device to the sink device in time divisional multiplexing including a plurality of first time slots and second time slots, and a clock channel configured to transmit a clock signal from the source device to the sink device in the first time slots and configured to transmit additional data from the source device to the sink device or from the sink device to the source device in the second time slots.

Abstract: An adaptive equalizer system for use in a serial communication link uses timing information generated by a phase detector of a clock and data recovery circuit of the serial communication link and a frequency pattern of the recovered data to determine whether the data received over the serial communication link is over-equalized or under-equalized. The equalizer strength of the adaptive equalizer system is adjusted based on such determination.

Abstract: A system for delivering power over a network of devices connected through a serial link includes a first and second differential pairs of wires. Each differential pair of wires is double AC coupled by a HPF on one side and by another HPF on an opposite side. An LPF connects a portion of each differential pair of wires between the HPFs to a voltage source, and another LPF connects that portion of each differential pair to a load. The system further includes a third and fourth differential pairs of wires. All four differential pairs of wires are located within a single cable, such as a CAT6 cable. The first, second and third differential pair of wires are used for video links, and the fourth differential pair of wires are used for the bi-directional hybrid link. A power delivery circuit in each device includes a voltage source, a power relay switch, a signature resistor for detection, and a load detector.

Abstract: A passive equalizer with negative impedance to increase a gain includes a first RC loop, a second RC loop, a cascade RL circuit and a cross-coupled inverter unit. Each of the first and the second RC loops includes a first resistor, a second resistor connected in series to the first resistor at a node to thereby form a resistor series, and a capacitor connected in parallel to the resistor series. The cascade RL circuit is connected between the RC loops and includes a fifth resistor, a sixth resistor and an inductor connected between the fifth resistor and the sixth resistor. The cross-coupled inverter unit is connected in parallel to the RL circuit and connected between the RC loops for using the feature of negative impedance to obtain an excellent high-frequency gain.

Abstract: A communication system, comprising a first node, a second node, a serial communication link between the first node and the second node, configured to transmit digital video data from the first node to the second node over one or more video channels of the link. The communication system further including a hybrid link between the first node and the second node, wherein the first node and the second node are configured to transmit at least one stream of data to the other through a hybrid channel over the hybrid link. In the communication system, the bandwidth of the serial communication link is scaled according to a video pixel frequency. Further, the initial locking of the serial communication link is aided by clock information delivered over the hybrid link.

Abstract: An adaptive equalizer system for use in a serial communication link uses timing information generated by a phase detector of a clock and data recovery circuit of the serial communication link and a frequency pattern of the recovered data to determine whether the data received over the serial communication link is over-equalized or under-equalized. The equalizer strength of the adaptive equalizer system is adjusted based on such determination.

Abstract: A digital video interface system and method for communicating digital video data from a source device to a sink device is provided, where the clock channel is used to transmit data as well as clock signals in a bi-directional, half-duplex manner using time division multiplexing. The digital video interface system comprises one or more data channels configured to transmit digital video data from the source device to the sink device in time divisional multiplexing including a plurality of first time slots and second time slots, and a clock channel configured to transmit a clock signal from the source device to the sink device in the first time slots and configured to transmit additional data from the source device to the sink device or from the sink device to the source device in the second time slots.