Abstract: A one-time programmable memory device includes a well of a first polarity in a semiconductor substrate. A lightly-doped drain (LDD) region is above one portion of the well. The LDD region has a first doping concentration and a second polarity that is opposite the first polarity. A source region or a drain region of the second polarity is above another portion of the well. The source region or the drain region has a second doping concentration that is higher than the first doping concentration. A first breakdown voltage between the LDD region and the well region is higher than a second breakdown voltage between the source region or the drain region and the well region. A select device is positioned at least partially above a portion of the source region or the drain region. The select device is configured to form a channel between the source region or the drain region and the LDD region. An anti-fuse device is positioned at least partially above a portion of the LDD region.

Abstract: A method and system for the automatic generation of instruction-set manuals. Specifically, the method of the present invention includes accessing an abstract processor model of a processor, wherein said abstract processor model is represented using a hierarchical architecture description language (ADL). The abstract processor model includes a plurality of instructions arranged in a hierarchical structure. An internal representation of the abstract processor model is generated by flattening the abstract processor model. The flattening process generates a plurality of rules grouped by common convergent instructions. Each rule describes an instruction path through the hierarchical structure that converges at a corresponding convergent instruction. An instruction-set documentation is automatically generated from the plurality of rules, wherein the instruction-set documentation is arranged convergent instruction by convergent instruction.