Abstract: A high speed data bus is time division multiplexed into multiple logical timeslot channels. Each of these timeslot channels is dynamically allocated to multiple endpoints within the data communication system. Each of these timeslot channels is shared from multiple communication sessions by the endpoints using a CMSA/CD methodology for allocating asynchronously usage of the timeslot channels. Additionally, network terminators may be used which may support multiple logical sessions by dedicating a timeslot channel to a network terminator and having other multiple endpoints coupled to this network terminator by way of the shared channel access protocol. Multiple copies of the shared channel access protocol procedure are located at a network terminator to handle multiple usages of the peripheral bus by the network terminator.