Patents Assigned to TAIPEI ANJET CORPORATION
  • Publication number: 20240146297
    Abstract: A gate driving device includes an operational amplifier, two impedances, a multiplexer, and an UVLO circuit. The operational amplifier has an output coupled to the gate of the SiC MOSFET, a positive power terminal coupled to a positive power rail, and a negative power terminal coupled to a negative power rail. The impedances are coupled in series and coupled between the output of the amplifier and a low-voltage terminal. The UVLO circuit is coupled to the multiplexer and the positive power rail and coupled to the positive power voltage of the positive power rail, a driving voltage, and an UVLO voltage. The UVLO circuit controls the multiplexer to transmit an off voltage or an on voltage to the positive input of the operational amplifier based on the positive power voltage, the driving voltage, and the UVLO voltage, thereby turning on or off the SiC MOSFET.
    Type: Application
    Filed: October 28, 2022
    Publication date: May 2, 2024
    Applicant: Taipei ANJET Corporation
    Inventors: Man Hay PONG, Wen-Chin Wu
  • Patent number: 11962292
    Abstract: A gate driving device includes an operational amplifier, two impedances, a multiplexer, and an UVLO circuit. The operational amplifier has an output coupled to the gate of the SiC MOSFET, a positive power terminal coupled to a positive power rail, and a negative power terminal coupled to a negative power rail. The impedances are coupled in series and coupled between the output of the amplifier and a low-voltage terminal. The UVLO circuit is coupled to the multiplexer and the positive power rail and coupled to the positive power voltage of the positive power rail, a driving voltage, and an UVLO voltage. The UVLO circuit controls the multiplexer to transmit an off voltage or an on voltage to the positive input of the operational amplifier based on the positive power voltage, the driving voltage, and the UVLO voltage, thereby turning on or off the SiC MOSFET.
    Type: Grant
    Filed: October 28, 2022
    Date of Patent: April 16, 2024
    Assignee: TAIPEI ANJET CORPORATION
    Inventors: Man Hay Pong, Wen-Chin Wu
  • Patent number: 11769841
    Abstract: A method for fabricating a junction barrier Schottky diode device is disclosed. The junction barrier Schottky device includes an N-type semiconductor layer, a plurality of first P-type doped areas, a plurality of second P-type doped areas, and a conductive metal layer. The first P-type doped areas and the second P-type doped are formed in the N-type semiconductor layer. The second P-type doped areas are self-alignedly formed above the first P-type doped areas. The spacing between every neighboring two of the second P-type doped areas is larger than the spacing between every neighboring two of the first P-type doped areas. The conductive metal layer, formed on the N-type semiconductor layer, covers the first P-type doped areas and the second P-type doped areas.
    Type: Grant
    Filed: September 19, 2022
    Date of Patent: September 26, 2023
    Assignee: TAIPEI ANJET CORPORATION
    Inventors: Nobuo Machida, Wen-Tsung Chang, Wen-Chin Wu
  • Patent number: 11646382
    Abstract: A junction barrier Schottky diode device and a method for fabricating the same is disclosed. In the junction barrier Schottky device includes an N-type semiconductor layer, a plurality of first P-type doped areas, a plurality of second P-type doped areas, and a conductive metal layer. The first P-type doped areas and the second P-type doped are formed in the N-type semiconductor layer. The second P-type doped areas are self-alignedly formed above the first P-type doped areas. The spacing between every neighboring two of the second P-type doped areas is larger than the spacing between every neighboring two of the first P-type doped areas. The conductive metal layer, formed on the N-type semiconductor layer, covers the first P-type doped areas and the second P-type doped areas.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: May 9, 2023
    Assignee: TAIPEI ANJET CORPORATION
    Inventors: Nobuo Machida, Wen-Tsung Chang, Wen-Chin Wu
  • Patent number: 10488212
    Abstract: In a method for tracking and navigating a group, a virtual interface is firstly used to provide a path group. Then, a plurality of members joins the path group through the virtual interface and one of the majority of members observes the position of each of the plurality of members. A plurality of navigating paths are respectively established according to positions of the plurality of members, so as to navigate the plurality of members to a destination of the path group. A plurality of mark points are designated in the navigating path of each of the plurality of members. Each of the plurality of members moves in the navigating path corresponded thereof. A warning signal is generated when the member diverges from the navigating path corresponded thereof or the member does not reach the destination. The plurality of members reach the destination to complete a tracking and navigating process.
    Type: Grant
    Filed: October 18, 2017
    Date of Patent: November 26, 2019
    Assignee: TAIPEI ANJET CORPORATION
    Inventors: Chien Liang Kuo, Hai Fang Liu