Patents Assigned to Taiwan Electronic Packaging Co., Ltd.
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Publication number: 20200381574Abstract: An optical sensing chip packaging structure includes a substrate, an optical sensing member, a light emitting member, a transparent glue layer and a transparent cover plate, wherein the optical sensing member is positioned on the substrate; the light emitting member is positioned on the optical sensing member, and the light emitting member includes a light emitting surface; the transparent glue layer is positioned on the light emitting member, and contacts and covers the light emitting surface; the transparent cover plate is positioned on the transparent glue layer.Type: ApplicationFiled: September 13, 2019Publication date: December 3, 2020Applicant: TAIWAN ELECTRONIC PACKAGING CO., LTD.Inventor: CHERNG-CHIAO WU
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Patent number: 10811399Abstract: An optical sensing chip packaging structure includes a substrate, an optical sensing member, a light emitting member and a transparent cover plate. The substrate has a recess; the optical sensing member is positioned in the recess, and is electrically connected to the substrate. The light emitting member is positioned in the recess, and is electrically connected to the substrate or the optical sensing member. The transparent cover plate is positioned on the substrate, and covers the optical sensing member and the light emitting member.Type: GrantFiled: March 27, 2019Date of Patent: October 20, 2020Assignee: TAIWAN ELECTRONIC PACKAGING CO., LTD.Inventor: Cherng-Chiao Wu
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Publication number: 20200312827Abstract: An optical sensing chip packaging structure includes a substrate, an optical sensing member, a light emitting member and a transparent cover plate. The substrate has a recess; the optical sensing member is positioned in the recess, and is electrically connected to the substrate. The light emitting member is positioned in the recess, and is electrically connected to the substrate or the optical sensing member. The transparent cover plate is positioned on the substrate, and covers the optical sensing member and the light emitting member.Type: ApplicationFiled: March 27, 2019Publication date: October 1, 2020Applicant: TAIWAN ELECTRONIC PACKAGING CO., LTD.Inventor: CHERNG-CHIAO WU
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Publication number: 20070272846Abstract: An image chip package structure includes a carrier member, an image sensing die, a protective shield and a plurality of wires. The image sensing die has a side connected to the carrier and an opposite side with an image sensing region and a plurality of die bonding pads around the image sensing region. The protective shield has a connecting portion and a top shield portion. The connecting portion is connected to the image sensing die between the image sensing region and the die bonding pads to isolate the image sensing region and the die bonding pads and to surround the image sensing region. The top shield portion is connected to the connecting portion and above the image sensing region. The wires electrically connect the die bonding pads of the image sensing die and the carrier member.Type: ApplicationFiled: August 8, 2007Publication date: November 29, 2007Applicant: Taiwan Electronic Packaging Co., Ltd.Inventor: Cheng-Chiao WU
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Patent number: 6635953Abstract: An IC chip package is constructed to comprise a substrate, a chip, adhesive means, and a cover. The substrate comprises a top side and a receiving chamber, the receiving chamber having an opening disposed in the top side. The top side of the substrate is provided with a plurality of connecting pads arranged around the opening of the receiving chamber. The chip is fixedly mounted in the receiving chamber and is provided with a plurality of connecting pads respectively electrically connected to the connecting pads of the substrate by means of bonding wires. The adhesive means is applied on the connecting area between the bonding wires and the connecting pads of the substrate. The cover is fixedly fastened to the adhesive means to close the opening of the receiving chamber.Type: GrantFiled: January 7, 2002Date of Patent: October 21, 2003Assignee: Taiwan Electronic Packaging Co., Ltd.Inventor: Cheng-Chiao Wu
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Publication number: 20020089039Abstract: An IC chip package is constructed to comprise a substrate, a chip, adhesive means, and a cover. The substrate comprises a top side and a receiving chamber, the receiving chamber having an opening disposed in the top side. The top side of the substrate is provided with a plurality of connecting pads arranged around the opening of the receiving chamber. The chip is fixedly mounted in the receiving chamber and is provided with a plurality of connecting pads respectively electrically connected to the connecting pads of the substrate by means of bonding wires. The adhesive means is applied on the connecting area between the bonding wires and the connecting pads of the substrate. The cover is fixedly fastened to the adhesive means to close the opening of the receiving chamber.Type: ApplicationFiled: January 7, 2002Publication date: July 11, 2002Applicant: TAIWAN ELECTRONIC PACKAGING CO., LTD.Inventor: Cheng-Chiao Wu