Abstract: An image generator is organized into a plurality of rendering engines, each of which renders an image of a part scene and provides the part image to a merge engine associated with that rendering engine. The image is a part image in that it usually contains less than all of the objects in the image to be rendered. The merge engine merges the part image from its associated rendering engine with the part image provided by a prior merge engine and provides the merged part image to a next merge engine. One or more merge engines are designated the output merge engines and these output merge engines output a merged part image that is (a portion of) the ultimate output of the image generator, the full rendered image. Each merge engine performs its merge process on the pixels it has from its rendering engine and from its prior neighbor merge engine, in a pipelined manner and without necessarily waiting for all of the pixels of the part image or the merged part image.

Abstract: A protocol for a transaction involving two homogenous or two heterogeneous computing systems involves starting a transaction on one of the two systems, sending a request for participation in the transaction to an application resident on the other of the two systems, together with an identification and address of the transaction. Upon receipt of the request, the application will initiate a subordinate transaction through a resident (subordinate) transaction manager. The subordinate transaction manager will notify the Beginner transaction manager and at the same time cause the application to start work on the request. Later, the subordinate transaction, through the subordinate transaction manager participates in a two-phase commit protocol that concludes the transaction to ensure that all changes effected by the transaction are done, or none are done, i.e., the transaction is aborted.

Abstract: An apparatus and method for tolerating failure of the AC power source in a power supply switchable between the AC power source and a battery, in a processor system having a set of one or more components subject to being powered down. When the failure of the AC power source is recognized, the power supply is switched from the AC power source to the battery. For a first period of time, the battery powers the processor system with all components powered on. The battery then powers the processor system with the specific set of components powered off for a second period of time. In one embodiment, a determination is made that the battery can power the processor system with the set of components powered down for a predetermined period of time. A determination of the first period of time is then made as the capacity of the battery exceeding the predetermined period of time, if the excess capacity is used to power the processor system with the set of components powered on.

Abstract: An on line serviceable computing system employing a small computer system interface (SCSI) bus architecture connecting two host computers to at least one additional shared device including a termination adapter circuit that can sense when a SCSI termination at the end of the SCSI bus is lost and automatically switch in a new SCSI bus termination to thereby ensure that the bus is terminated at both ends as required for continuous operation.

Abstract: A method is presented that enhances the survivability of system software components, even in the event of catastrophic failure of the computing element on which they reside. In particular, the combination of a distributed operating system (Non Stop Clusters) and a fault-tolerant interconnect (ServerNet) provides an environment conducive to posthumous recovery strategies that have been unavailable in previous distributed computing environments. The specific strategy outlined here is called resource harvesting, and involves a novel approach that retrieve critical data structures of memory from a failed computing element for reconstruction on a non-failed computing element, allowing such critical data structures to continue with their original function.

Abstract: A computer program product simulates shared code threads with Windows NT fibers. Computer code is included for reusing shared code threads which complete.

Abstract: A system and technique of auto-configuring a first module to be in the same mode as a second module includes testing the frequency of a clock signal received from the second module to determine its mode of operation. The first module then auto-configures its ports to be in the same state as the second module. Additional test include the number of clock signals and symbol size to detect additional modes of operation. The first module is auto-configured as a result of the tests.

Abstract: An operating system is simulated to run in conjunction with a native operating system, allowing processes originally developed for the operating system being simulated to be ported to the environment of the native operating system with a minimum of effort. In the event a ported process attempts to communicate with a terminated process before the simulated operating system is notified of the termination, the attempt at communication will return an error. In response, a series of checks are performed to determine if the error was the result of termination of the process with which communication was attempted, or a more serious error that should be reported to the native operating system for action to protect the integrity of data.

Abstract: A two-level memory region registration and address translation method includes a memory handle table and a translation and protection table (TPT). Each memory region registered is associated with a unique memory handle index which accesses one entry of the memory handle table. The accessed entry in the memory handle table stores a memory handle that is combined with virtual addresses in the registered memory region to access TPT entries storing translation data for the virtual addresses in the registered memory region.

Abstract: A method and apparatus for providing kernel mode support for fast IPC between a client process and a server process. A client application accesses a kernel mode of an operating system via a device driver or similar method. The client creates an abstract "resource" data type and derives a client port therefrom. The client port references a call structure containing object call data. The call is transported via a transport agent to the server. The server accesses the kernel mode of the operating system and creates a resource data type and a server port derived from the resource type. The server awaits calls from the clients using the server port. When a call arrives, the server port extracts the data from the call structure and performs the requested service. The server port then transmits a response back to the client. The use of the abstract resource data type permits portability across different operating systems and platforms.

Abstract: A multiprocessor system includes a number of sub-processor systems, each substantially identically constructed, and each comprising a central processing unit (CPU), and at least one I/O device, interconnected by routing apparatus that also interconnects the sub-processor systems. A CPU of any one of the sub-processor systems may communicate, through the routing elements, with any I/O device of the system, or with any CPU of the system.Communications between I/O devices and CPUs is by packetized messages. Interrupts from I/O devices are communicated from the I/O devices to the CPUs (or from one CPU to another CPU) as message packets.CPUs and I/O devices may write to, or read from, memory of a CPU of the system. Memory protection is provided by an access validation method maintained by each CPU in which CPUs and/or I/O devices are provided with a validation to read/write memory of that CPU, without which memory access is denied.

Abstract: A system area network computer system architecture is structured as a single system image cluster operating system to offer an opportunity to increase the availability to I/O devices in the system. The computing system comprises a number of processor units coupled to a plurality of input/output (I/O) elements by a routing fabric that provides each of the processor elements with access to any one of the I/O elements. Using a Transparent Network Computing extension to a highly available version of UNIX System V Release 4.2, the system provides a higher degree of availability to I/O devices by providing for the takeover of their controlling entity.

Abstract: A multiprocessor system includes a number of sub-processor systems, each substantially identically constructed, and each comprising a central processing unit (CPU), and at least one I/O device, interconnected by routing apparatus that also interconnects the sub-processor systems. A CPU of any one of the sub-processor systems may communicate, through the routing elements, with any I/O device of the system, or with any CPU of the system. Communications between I/O devices and CPUs is by packetized messages. Interrupts from I/O devices are communicated from the I/O devices to the CPUs (or from one CPU to another CPU) as message packets. CPUs and I/O devices may write to, or read from, memory of a CPU of the system. Memory protection is provided by an access validation method maintained by each CPU in which CPUs and/or I/O devices are provided with a validation to read/write memory of that CPU, without which memory access is denied.

Abstract: A circular queue is asynchronously accessed and managed by two separate processing elements. Each data element is added to the queue together with a zero data element that both marks the tail of the queue and signifies that the queue is empty. Data elements are removed from the queue in the order in which they were stored (first-in-first-out) and a manner that allows multiple, concurrent access to the queue. When the queue is accessed to remove a data element the element is first tested. If it is non-zero, the removal process continues; if zero, the queue is considered empty. The management of the queue permits dynamic re-sizing (i.e., making the queue larger or smaller) while data elements are being added and/or removed.

Abstract: A computing system in the form of a cluster of a number of multiprocessing nodes maintains, in a fault tolerant manner, a distribution of configuration data for each of the nodes so that each node has a database containing the configuration data associated with that node. The database, and therefore, the configuration data it contains, associated with any one node is substantially identical to that of any other node. A process running on one of the nodes is responsible for receiving a requests that require modification of the configuration data. Effecting changes to the configuration data, and therefore the distributed databases, includes the steps of first writing the requested change to a master audit log, distributing the change request to all nodes, receiving back from the nodes acknowledgement of the change request being effected at the acknowledging node, and then writing again to the master audit log that the change has been effected throughout the system.

Abstract: A system for issuing a family of instructions during a single clock includes a decoder for decoding the family of instructions and logic, responsive to the decode result, for determining whether resource conflicts would occur if the family were issued during one clock. If no resource conflicts occur, an execution unit executes the family regardless of whether dependencies among the instructions in the family exist.

Abstract: A preferred embodiment of the present invention includes a method and apparatus for sending messages between memory spaces included in a computer network. More specifically, for a preferred embodiment, each memory space included in a computer network is identified by a site id that is composed of a manufacturer id and a machine id. When messages are sent between memory spaces, the site id of the sending memory space is compared to the site id of the receiving memory space. If the site ids match, the message is sent using an intra-memory copy. Otherwise a networking protocol is invoked. Importantly, the comparison between site ids occurs relatively early in the sending of the message. As a result, efficiency is increased in cases where a message is being sent within the same memory space.

Abstract: A fault tolerant computer system distributes audit trail files containing audit records, across an arbitrary number of disk volumes. After one audit trail file becomes full, audit records are directed toward a next audit trail file stored on a different disk volume. Storage of newly generated audit rotates through the disk volumes in round-robin fashion. Full audit trail files are eventually archived and their space becomes available again for renaming and storage of newly generated audit records. The number of audit records available for on-line recovery after a failure is not limited to the storage capacity of any single disk volume. Furthermore, there is no contention for disk access between archiving of full audit trail files and storage of newly generated audit records.

Abstract: Logic circuitry in the form of an integrated circuit includes a number of scannable registers located at various locations of the logic circuitry to continuously sample signal states thereat. In response to signalling from a maintenance diagnostic processor the scannable registers can be commanded to freeze their content for extraction and observation to determining the operating condition of the logic circuitry.

Abstract: A method, system, apparatus, and program for translating one computer language to another using doubly-rooted tree data structures. A doubly-rooted tree is the combination of two sets of hierarchically related objects sharing a common set of leaves. An N-rooted tree is also described. When a doubly-rooted tree is constructed in the specified manner and then translated to a second doubly-rooted tree, source language code is transformed into target language code. In addition, the translation preserves preprocessor characteristics of the source language code including macros, conditionally compiled regions of code, source inclusion statements, and comments.