Abstract: A device and method for generation of Intersymbol interference (ISI) effects on serial data by direct digital synthesis is described. The features of the present invention allow user to set parameters such as data rate, voltage amplitude, encoding scheme etc. as per requirements. An ISI parameter value is selected and applied to the serial data to produce ISI effects in the serial data. Alternatively according to another feature the patterns may be set as per industry standards.

Abstract: A signal generator can control phase relationship between output signals of the channels without stopping clocks provided to the channels to enable the circuit operation fast. First and second channels 20 and 22 have signal generation blocks 10 and 12 that have clock phase shift circuits 26 and 28, memories, parallel to serial converters and DACs respectively. A phase comparator 24 compares data reading clocks from the signal generation blocks 10 and 12 to produce a phase difference signal wherein the data reading clocks are used to read waveform data from the memories within the signal generation blocks 10 and 12. A CPU controls the clock phase shift circuits 26 and 28 according to the phase difference signal to shift phases of the clocks provided to the signal generation blocks 10 and 12 and then makes phase relationship between the output signals of the first and second channels 20 and 22 as desired.

Abstract: A signal generation system maintains a phase relationship between output signals of first and second signal generators even when the sampling clock frequency is changed. The signal generators are coupled via a communication means including a dedicated cable where the delay amount of the communication means is known and fixed. The first signal generator provides sampling clock, sequence clock and trigger/event signals to the second signal generator and CPUs of the generators share information via the cable. When the frequency of the sampling clock is changed, the CPU of the first or second signal generator calculates the clock number of the frequency changed sampling clock equivalent to the delay amount of the communication means. A delay circuit of the first signal generator 100 delays the waveform data by one sampling clock based on the calculated value for adjusting phase relationship between the waveform data in the signal generators 1.

Abstract: This invention relates to a system and method of monitoring, by establishing end to end loopback testing across one or more networks with dissimilar transport technologies. The system allows for connection in loopback mode from a standard interface on a test device to a media adaptor located on an IP-based access network, such as a standard multimedia terminal adapter (“MTA”). End-to-End Quality of service delivered over the transmit and receive path can thus be monitored. Loopback tests are initiated from designated endpoints on the network and made operational by attaching a tag to a telephone number, to allow the gateway to signal connection mode to a call agent.

Abstract: An apparatus and method of evaluating whether an image under test is similar to a reference image, the method comprising performing a test on pairs of blocks in turn, each pair of blocks comprising a block of the image under test and a corresponding block of the reference image, the test comprising calculating a difference measure indicative of the difference between the blocks and comparing the difference measure to a threshold, wherein the test is passed if the difference measure betters the threshold, and the image under test and the reference image are deemed to be similar if the test is passed by all of the pairs of blocks.

Abstract: A signal generator generates a WiMedia ultra wideband test signal with a user interface for setting test sequences and parameters of the test signal. Parameters are set for Presentation Protocol Data Units associated with Packet Groups of the test signal. A signal processing unit compiles the Groups containing the Presentation Protocol Data units to generate digital data representative of the test signal. A waveform generator receives the digital data and generating a test signal output having Packet Groups containing Presentation Protocol Data Units. A method is describes for setting test sequences and parameters of an ultra wideband test signal test signal with a user interface of the signal generator.

Abstract: A signal generator generates amplitude noise on a selected segment of a test signal. A user interface is used for selecting a segment of the test signal and an associated power level for applying amplitude noise at a selected power level to the test signal segment. A signal processing unit compiles the selected power level of the selected segment with the test signal to generate digital data representative of the test signal with selected segments having amplitude noise. A waveform generator receives the digital data and generating a test signal output having amplitude noise at selected segments of the test signal. The method includes the steps of: selecting a segment of the test signal to add amplitude noise; selecting a power level for the amplitude noise; and applying the amplitude noise at the selected power level to the selected segment of the test signal.

Abstract: Embodiments of the present invention provide a protocol tester for performing a protocol test, said protocol tester exhibiting an input for the feeding in of data, a protocol decoding device for the decoding of data, and an output for providing the decoded data, the protocol tester also comprising a device for measuring the bit error rate. A corresponding method for performing a protocol test is also provided.

Abstract: A measurement indicator, “transfer efficiency,” is provided for evaluating conditions of propagation paths of wireless communication systems having a plurality of transmitting and receiving antennas. Transfer functions of signal paths are calculated from data of received signals that are obtained with receiving antennas by receiving OFDM signals transmitted by transmitting antennas. A demodulation matrix is calculated for demodulating a transmitting vector from a receiving vector concerning a desired subcarrier of the received signals. A noise amplification factor is calculated as a square root of a sum of second powers of components of the demodulation matrix of the receiving antennas concerning the desired transmitting antenna. The noise amplification factor or the inverse is displayed as a value or as a graph that has an axis concerning the subcarrier and an axis concerning the noise amplification factor or the inverse.

Abstract: The embodiments herein provide a device and method to generate Pre-emphasized signal. In one embodiment herein an input file containing digital data representing a digital data pattern waveform is received and up-sampled by an Fs/Fd rate. The up-sampled digital data is used for generating step response. The generated step response is differentiated to generate coefficients of a pre-emphasis filter which are convolved with the digital data pattern waveform input signal to generate a pre-emphasized digital data pattern waveform file.

Abstract: A data generator has stable duration from trigger arrival to substantial data output start. A memory provides parallel data according to a divided clock. An address counter provides the same address to the memory until a trigger signal arrives and starts increasing the address after the trigger signal. A hexadecimal counter counts a clock that is faster than the divided clock as the counted number circulates every one period of the divided clock . A trigger information latch latches the counted number of the counter when the trigger signal arrives and provides it to a MUX. The MUX selects data in a pair of the parallel data provided at first and second inputs I1 and I2 to produce rearranged parallel data bits according to the latched counted number. A parallel to serial converter receives the rearranged parallel data to convert it to serial data according to the clock.

Abstract: Embodiments of the present invention relate to a method for analyzing a process of a communication taking place between at least two instances, wherein the communication process comprises a sequence of several calls, which in turn comprise at least one message, wherein the communication process is represented on a display unit by symbols, and wherein a first plurality of messages forms a first procedure and a second plurality of messages forms a second procedure, and the first plurality of messages is represented by a first symbol and the second plurality of messages is represented by a second symbol, so that one procedure each is represented by a single symbol. Embodiments of the invention also relate to protocol testers for performing the method.

Abstract: A receiver 31 receives a wireless signal of, for example, an RFID system that conducts communication with a wireless signal based on reflection modulation. A demodulation block 33 demodulates the received signal obtained at the receiver 31 with orthogonal demodulation. A display block 36 provides signal points derived from the orthogonal demodulation onto an orthogonal coordinate display to display characteristics of the reflection modulation concerning an RF tag that conducts the reflection modulation of the wireless signal. The display of the signal points may have vector display or at least numerical values indicating magnitudes of the vectors. The processed results may be stored and signal points based on the stored results may be displayed on the orthogonal coordinate to compare sets of the characteristics of the reflection modulations on the display.

Abstract: A signal processing block 16 calculates propagation characteristics of a propagation path from a signal under test. A display block 17 displays the propagation characteristics calculated by the signal processing block 16. The propagation characteristics are displayed on a two dimensional coordinate of which one axis is elapsed time, and the calculated results of the propagation characteristics are represented with colors or brightness on the two dimensional coordinate. For example, powers or phases are represented with colors or brightness on a two dimensional coordinate of which axes are frequency and elapsed time to display the transfer functions. Amplitudes of delay profiles are represented with colors or brightness on a two dimensional coordinate of which axes are delay time and elapsed time to display the delay profiles.

Abstract: Sets of time domain data of respective frequency bands from Fd-1 to Fd-n of a periodic input signal Fs are acquired. Sets of the time domain data of the common frequency band are extracted from the sets of the time domain data of the frequency bands Fd-1 and Fd-2 in the acquired frequency bands. Correlativity between the sets of the time domain data of the common frequency band is determined while shifting time relationship between the sets each other to identify the sets of time domain data having correspondence relationship. The sets of the time domain data having the correspondence relationship in the time domain data of the adjacent frequency band Fd-1 and Fd-2 are converted to the sets of the frequency domain data respectively, and the sets of the frequency domain data are combined to produce one set of combined frequency domain data.

Abstract: An up-converter 124 frequency-up-converts an analog signal Sm. A down-converter 121 frequency-down-converts analog signal Sm. A signal selection block 125 selects one of the frequency-up-converted signal Sfu and frequency-down-converted signal Sfd. The signal Se selected by the signal selection block 125 is provided to the primary winding of a transformer 127. A signal induced in the secondary winding of the transformer 127 is provided to an A/D converter 128 to produce a digital signal Dm. For example, if the analog signal Sm has DC or a low frequency close to DC, the signal Sfu is selected as the signal Se. If the analog signal Sm does no have DC nor a low frequency close to DC, the signal Sfd is selected as the signal Se.

Abstract: A plurality of RF signals are generated with the RF signals synchronized with each other with high accuracy. Transmission data of the multiple channels are modulated, the modulated data of the channels are added to produce composite data and the composite data is stored in a data storage device. In the modulation process, the carrier frequencies are different from each other. The composite data comprises the data of the channels modulated in the frequency division multiplexing manner. The composite data is converted into an analog composite signal by a D/A converter and this analog signal is upconverted to an RF frequency by a frequency conversion circuit. A signal separation circuit produces two channel signals from the RF frequency signal. A signal output circuit generates the output signals having desired frequencies and signal levels.

Abstract: Embodiments of an apparatus for generating a constellation diagram generates a first ellipse, or circle, centered on a constellation point having radii representative of current average values of an error rate metric. In further embodiments, the constellation diagram display has a second ellipse, or circle, centered on the constellation point having radii representative of a predetermined maximum permissible value of the error rate metric.

Abstract: A data generator has stable duration from trigger arrival to substantial data output start. A memory provides parallel data according to a divided clock. An address counter provides the same address to the memory until a trigger signal arrives and starts increasing the address after the trigger signal. A hexadecimal counter counts a clock that is faster than the divided clock as the counted number circulates every one period of the divided clock . A trigger information latch latches the counted number of the counter when the trigger signal arrives and provides it to a MUX. The MUX selects data in a pair of the parallel data provided at first and second inputs I1 and I2 to produce rearranged parallel data bits according to the latched counted number. A parallel to serial converter receives the rearranged parallel data to convert it to serial data according to the clock.

Abstract: A pulse delay circuit induces lager jitter to faster input reference pulse trains than before. A buffer receives a reference pulse train and provides non-inverted and inverted pulses. Low pass filters (LPF) and comparators receive the non-inverted and inverted pulses from the buffer and provide pulses having delayed leading and trailing edges. Dividers divide the delayed pulses by 2 to produce the respective pulse trains having a half frequency. An XOR gate produces an exclusive OR of the delayed and divided pulse trains to provide a pulse train having delayed leading and/or trailing edges relative to the reference pulse train. If the delays by the LPFs and comparators are changed, the output pulses from the XOR gate have jitter.