Abstract: A high-order delta-sigma analog-to-digital converter. A plurality of stages are connected to accept an analog input signal and produce a digital output signal. Each stage has a resettable ?-? converter of second order or higher. Resetting each stage before accepting a new input purges the integrators of any information related to the previous input, allowing step inputs to the system. The stability of the converter is ensured using local feedback loops at each stage. Each stage provides a digital representation of a portion of the analog input signal. A decimation filter receives the digital signals from the stages and arranges them into the digital output signal.

Abstract: A dual field of view sighting system uses liquid crystals, flip-polarizers and/or flip-mirrors to select between at least two fields of view.

Abstract: An imaging system includes a row and column array of active pixels, each having an associated pitch. In response to respective control signals, each pixel outputs a reset level which includes noise components, or a signal level which includes signal and noise components. Multiple column buffers, each having a pitch equal to or less than that of a pixel, convey the outputs of respective pixel columns to a bus line. Each buffer comprises ‘odd’ and ‘even’ S&H/CDS circuits, which process the pixel outputs of odd and even rows, respectively. Each S&H/CDS circuit subtracts pixel reset level from signal level to produce an output in which correlated noise is suppressed. Each column buffer includes a buffer amplifier which conveys the output to the bus line. A gain amplifier separate from the column buffers is coupled to the bus line such that it amplifies the outputs of a multiple column buffers.

Abstract: A three dimensional integrated circuit and method for making the same. The three dimensional integrated circuit has a first and a second active circuit layers with a first metal layer and a second metal layer, respectively. The metal layers are connected by metal inside a buried via. The fabrication method includes etching a via in the first active circuit layer to expose the first metal layer without penetrating the first metal layer, depositing metal inside the via, the metal inside the via being in contact with the first metal layer, and bonding the second active circuit layer to the first active circuit layer using a metal bond that connects the metal inside the via to the second metal layer of the second active circuit layer.

Abstract: A method for diagnosing a fluid includes sensing a property of the fluid and the temperature of the fluid at the time the property is sensed, then determining the status of the fluid from the sensing. The sample volume may be small in comparison to the total fluid volume.

Abstract: A three dimensional integrated circuit and method for making the same. The three dimensional integrated circuit has a first and a second active circuit layers with a first metal layer and a second metal layer, respectively. The metal layers are connected by metal inside a buried via. The fabrication method includes etching a via in the first active circuit layer to expose the first metal layer without penetrating the first metal layer, depositing metal inside the via, the metal inside the via being in contact with the first metal layer, and bonding the second active circuit layer to the first active circuit layer using a metal bond that connects the metal inside the via to the second metal layer of the second active circuit layer.

Abstract: A method of performing alternating quadratures differential binary phase shift keying modulation involves limiting phase changes between adjacent in time modulator output symbols to ±90 °, and transmitting modulator input data by 0° and 180° phase differences between non-adjacent in time modulator output symbols.

Abstract: A multi-color photo sensor having a first photodiode with a first p-type layer and a first n-type layer, the first photodiode generates charge when illuminated with photons of a first wavelength range, a second photodiode with a second p-type layer and a second n-type layer, the second photodiode generates charge when illuminated with photons of a second wavelength range, and a readout integrated circuit electrically coupled to the first n-type layer of the first photodiode via a first metal interconnect and electrically coupled to the second n-type layer of the second photodiode via a second metal interconnect, the second metal interconnect traverses through the first photodiode to contact the second n-type layer of the second photodiode, the second metal interconnect is separated from the first photodiode by a first passivating insulator.

Abstract: The present invention is an improved energy harvester or generator based on a yoked magnet array design based on a plurality of magnets arranged into at least two spaced apart linear or circular magnet arrays. The spaced apart magnet arrays are juxtaposed with each magnet in one array attractively interacting with the corresponding magnet in the other array across a small gap. The magnetic flux across the gap is further enhanced by having adjacent magnets in each array having alternate magnetic orientation and by providing a magnetic yoke of magnetically permeable material for the magnet ends of each array that do not face the gap. The gap is provided to allow a conductor in the form of a coil fit between the magnets. Relative motion between the coil and the magnets results in maximal generation of electrical power by the coil.

Abstract: The present invention relates to a method and apparatus to reduce dielectric discharge in liquid crystal cells driven with high voltage. In one embodiment, the present invention is a liquid crystal cell including a substrate with a surface and a tapered conductive film on top of the surface of the substrate including a first end and a second end. In another embodiment, the present invention is a method for forming a liquid crystal cell including covering a portion of a surface of a substrate with a shadow mask and then depositing conductive film onto the surface of the substrate such that the conductive film is tapered.

Abstract: A pixel for a CMOS photo sensor having a photosensitive element configured to collect charge when light strikes the photosensitive element, a charge-multiplication circuit having a first electrode, a second electrode, and a third electrode, the charge-multiplication circuit is configured to transfer the charge from the photosensitive element to the first electrode, apply a predetermined voltage to the second electrode to induce charge multiplication, transfer the charge from the first electrode to the second electrode for charge multiplication, and transfer a plurality of charge from the second electrode to the third electrode and onto a sense node, and a readout circuit coupled to the sense node, the readout circuit measures a voltage corresponding to the plurality of charge transferred to the sense node.

Abstract: A metamorphic high electron mobility transistor having a plurality of high electron mobility transistor layers, a semi-insulating substrate, a ternary metamorphic buffer layer positioned between the semi-insulating substrate and the plurality of high electron mobility transistor layers, the ternary metamorphic buffer layer being Al1-xGaxSb such that x is greater than or equal to 0.2 but less than 0.3, a stabilizing layer positioned between the ternary metamorphic buffer layer and the plurality of high electron mobility transistor layers, the stabilizing layer being Al1-yGaySb such that y is greater than 0.2 but less than or equal to 0.3 and y is greater than x, and a nucleation layer interposed between the semi-insulating substrate and the ternary metamorphic buffer layer.

Abstract: A backside illuminated CMOS image sensor having an silicon layer with a front side and a backside, the silicon layer liberates charge when illuminated from the backside with light, an active pixel circuitry located on the front side of the semiconductor layer, a pinned photodiode adjacent to the active pixel circuitry on the front side of the semiconductor layer and configured to collect charge liberated in the semiconductor layer, and an implant located in the semiconductor layer, underneath the active pixel circuitry, for allowing charge liberated in the semiconductor layer to drift from the backside of the semiconductor layer to the pinned photodiode on the front side of the semiconductor layer.

Abstract: An array of microlenses magnifies the effective negative luminescence regions of a sparsely populated NLCS so that the NLCS appears cold to a FPA. This approach reduces the total diode area with minimal effect on device processing. The microlenses are fabricated on the backside of the substrate away from the devices, either prior to or after device processing. This ensures high quality devices that maintain NL efficiency without negatively impacting power consumption.

Abstract: A detector circuit having an integration capacitor coupled to an amplifier via a switch matrix and a comparator coupled to the amplifier, the integration capacitor operable in two or more phases, the switch matrix is configured to phase switch the integration capacitor, the comparator triggers the phase switch when the output voltage of the amplifier passes the threshold voltage of the comparator.

Abstract: A backside illuminated CMOS image sensor having an silicon layer with a front side and a backside, the silicon layer liberates charge when illuminated from the backside with light, an active pixel circuitry located on the front side of the semiconductor layer, a pinned photodiode adjacent to the active pixel circuitry on the front side of the semiconductor layer and configured to collect charge liberated in the semiconductor layer, and an implant located in the semiconductor layer, underneath the active pixel circuitry, for allowing charge liberated in the semiconductor layer to drift from the backside of the semiconductor layer to the pinned photodiode on the front side of the semiconductor layer.

Abstract: A two dimensional time delay integration CMOS image sensor having a plurality of pinned photodiodes, each pinned photodiode collects a charge when light strikes the pinned photodiode, a plurality of electrodes separating the plurality of pinned photodiodes, the plurality of electrodes are configured for two dimensional charge transport between two adjacent pinned photodiodes, and a plurality of readout nodes connected to the plurality of pinned photodiodes via address lines.

Abstract: The corrosion inhibiting activity of a coating is determined from the effect of corrosion inhibiting species released by the coating on the oxygen reduction current for a cathode placed very close to the coating. A rotating disk electrode or pumped solution flow is used to sweep the corrosion inhibiting species from the coating surface to the cathode. The oxygen reduction current is measured under conditions of oxygen diffusion control.

Abstract: A method and apparatus for changing the polarization of an input signal includes propagating a polarized input signal having orthogonal E-field components by at least one surface each having a respective surface impedance and varying at least one of the surface impedances to shift the phase of one of the components independently from the other so that the polarity of said input signal is changed. Bi-directional propagation is achieved by rotating polarity in one direction but not the other.

Abstract: A dynamic magnet system, particularly useful for electrical generation, employs multiple magnets in polar opposition to each other for individual movement relative to a support structure. The magnets have a critical angle of displacement from a horizontal static position of less than 1 degree, with at least some of the magnets having mutually different properties. With different magnetic strengths, a greater movement is produced for both magnets in response to movements of the support structure, for particular ranges of magnetic strength ratios, than would be the case with equal magnets. The magnet movement can be translated into an electrical signal to power an operating system. Ultra low friction ferrofluid bearings can be used to establish static coefficients of friction between the magnets and support structure less than 0.02, enabling useful power generation from only slight movements of the support structure.