Abstract: The exemplary embodiments may provide an approach to finding and identifying the correlation between the invoking code and the invoked code by correlating the timestamps of contextual information of code in the invoking code and invoked code. As a result, developers have information during investigating the programs and can use the information to identify a region of interest to narrow down a performance problem in the invoking code efficiently. As a result, development productivity can be improved.

Abstract: Systems and methods for syntactical change-resistant code generation are described. A code generator can generate syntactical change-resistant code from original code and new code, where the new code may be intended as a replacement or update for the original code. The code generator can determine, for code portions and/or sub-portions of the new code, whether or not semantic, syntactic, and structural differences from the original code exist. The code generator can generate the syntactical change-resistant code to leverage and include in the syntactical change-resistant code portions and sub-portions of the original code that have been used and tested, so as to improve reliability of the syntactical change-resistant code.

Abstract: Systems and methods for syntactical change-resistant code generation are described. A code generator can generate syntactical change-resistant code from original code and new code, where the new code may be intended as a replacement or update for the original code. The code generator can determine, for code portions and/or sub-portions of the new code, whether or not semantic, syntactic, and structural differences from the original code exist. The code generator can generate the syntactical change-resistant code to leverage and include in the syntactical change-resistant code portions and sub-portions of the original code that have been used and tested, so as to improve reliability of the syntactical change-resistant code.

Abstract: Systems and methods automatically construct a realization of a model from an available set of alternative co-simulation components, where the realization meets one or more objectives, such as fidelity, execution speed, or memory usage, among others. The systems and methods may construct the realization model by setting up and solving a constrained optimization problem, which may select particular ones of the alternative co-simulation components to meet the objectives. The systems and methods may configure the realization, and execute the realized model through co-simulation. The systems and methods may employ and manage different execution engines and/or different solvers to run the realization of the model.

Abstract: In accordance with some embodiments, a non-transitory computer-readable medium storing executable instructions that, when executed by a processor, may cause the processor to receive a value setting via a user interface associated with a first program code, and generate a second program code that, when executed, produces a computational result. To generate the second program code, the instructions, when executed by the processor, may cause the processor to obtain a portion of the first program code that, when executed with the value setting, generates the computational result, determine an organizational structure of the portion, the organizational structure including a plurality of stages, determine, in one or more of the plurality of stages, a first segment of code that accesses the value setting and a second segment of code that does not access the value setting, and replace the first segment with the value setting.

Abstract: Systems and methods may configure a programmable logic device to efficiently run a deep learning (DL) network. Architecture code and algorithmic code may be generated. The architecture code may define convolutional and fully connected processor cores structured to run the layers of a Deep Neural Network (DNN). The processor cores may be interconnected by a First In First Out (FIFO) memory. The architecture code may also define stride-efficient memories for implementing convolution. The algorithmic code may include configuration instructions for running the DNN's layers at the processor cores. The algorithmic code may also include a schedule for executing the configuration instructions on the processor cores, for moving network parameters to the processor cores, and for transferring outputs between the layers.

Abstract: A system and method intelligently and automatically improves the performance of a model. The system employs heuristics to select a plurality of performance rules that conform to one or more criteria specified for the performance analysis process. The performance rules include checks to be run on the model and offer advice, such as proposed changes that, if made to the model, may improve its performance. The system may evaluate the proposed changes to determine whether or not they produce an improvement in the model's performance. Proposed changes validated as improving model performance are retained, while proposed changes found not to improve performance are removed.

Abstract: A device may receive data associated with executing a model. The data may be associated with a solver used during execution of the model. The device may determine a presentation order of a plurality of model items based on the data associated with executing the model. The solver may be used to determine values associated with the plurality of model items. The presentation order of the plurality of model items may be determined based on a plurality of factors. The plurality of factors may be associated with the values. The device may generate a graphical interface that indicates the presentation order of the plurality of model items. The device may provide the graphical interface. The graphical interface may provide, for display, a list of the plurality of model items. The list may be provided in association with the presentation order.

Abstract: A scheduler is provided for tall algorithms that include control flow statements that are dependent on tall computations. Thunks may be defined for the tall algorithms and the boundaries or limits of the thunks may be determined by places where tall variables are required to be gathered. The scheduler executes the tall algorithms by calling individually the thunks from the tall algorithms and pausing when a gather operation is required. The scheduler collectively gathers the tall variables from different tall algorithms by using an optimizer to combine I/O operations for the tall algorithms. The scheduler may put back the gathered variables into the context of each tall algorithm, and the scheduler may resume with the next thunk for each tall algorithm. This process may be repeated until all tall algorithms are finished.

Abstract: Systems and methods generate code from a source program where the generated code may be compiled and executed on a Graphics Processing Unit (GPU). A parallel loop analysis check may be performed on regions of the source program identified for parallelization. One or more optimizations also may be applied to the source program that convert mathematical operations into a parallel form. The source program may be partitioned into segments for execution on a host and a device. Kernels may be created for the segments to be executed on the device. The size of the kernels may be determined, and memory transfers between the host and device may be optimized.

Abstract: In accordance with some embodiments, a method may include displaying, by one or more processors, a user interface (UI) element associated with UI program code, the UI element embedded in first program code. The method may include receiving, by the one or more processors, a first value setting of a UI control of the UI element, and executing, by the one or more processors, the UI program code. The executing may be triggered by the receiving of the first value setting, the executing producing a first result comprising a computational result that is graphically displayed by the UI element. The method may further include generating, by the one or more processors and following the executing, second program code comprising a code portion that, when executed, produces the computational result.

Abstract: Extended types are defined for functions that are called by function handles in a programming environment. The extended types can be accessed and used by a computing system to improve compile-time and run-time performance of the computing system.

Abstract: Systems and methods evaluate simulation models and measure floating point arithmetic errors in terms of Unit in Last Place (ULP). The simulation model may include model elements that perform numerical computations using Native Floating Point (NFP) arithmetic. The model elements may be arranged to implement a procedure. A data store may include local ULP errors predetermined for the model elements. The systems and methods may retrieve the local ULP errors for the model elements included in the model, and may apply a rules-based analysis to compute an overall ULP error of the simulation model. The systems and methods may present the overall ULP computed for the model. The systems and methods may also present intermediate ULP errors determined for portions of the simulation model. Changes may be made to the model to reduce the overall ULP error.

Abstract: Systems and methods for just-in-time compilation are disclosed. The systems and methods can be used to generate composite blocks, reducing program execution time. The systems and methods can include generating single-trace blocks during program execution. Upon satisfaction of a trigger criterion, single-trace blocks can be selected for compilation into a composite block. The trigger criterion can be a number of executions of a trigger block. Selecting the single-trace blocks can include identifying blocks reachable from the trigger block, selecting a subset of the reachable blocks, and selecting an entry point for the composite block. The composite block can be generated from the single-trace blocks and incorporated into the program control flow, such that the composite block is executed in place of the selected single-trace blocks.

Abstract: Systems and methods validate the operation of a component of an executable model without inadvertently altering the behavior of the component. The model may be partitioned into a design space and a verification space. The component may be placed in the design space, while an observer for validating the component may be placed in the verification space, and linked to the component. During execution of the model, input or output values for the component may be computed and buffered. Execution of the observer may follow execution of the component. The input or output values may be read out of the buffer, and utilized during execution of validation functionality defined for the observer. Model compilation operations that may inadvertently alter the behavior of the component, such as back propagation of attributes, are blocked between the observer and the component.

Abstract: A system determines what aspects of input sources contribute to code generation and provides associations between the input sources and components of features of the generated code. These associations may be visualized by displaying visual cues of the associations. The input sources may be of different types, including but not limited to a model, a code generator and values for atomic configuration setting for code generation. The visual cue that is displayed may take the form of a visible connection between the input sources and the relative portion or portions of the generated programming code. Suggestions may be generated in response to edits to the generated programming code as to how the sources may be modified to provide desired changes in the generated programming code. Analysis may be performed to identify artifacts in the generated programming code and associations to the sources may be identified to specify what source contributed to portions of the generated programming code.

Abstract: Methods and systems are described for automatically setting multitasking configurations that are used to check, by a code-checking system, implementation code that is to be deployed on a dynamic system. Attributes of implemented tasks and interrupt service routines that can run concurrently on the dynamic system are determined from one or more specification data structures of a specified model and associated with independent, implemented computational threads prepared from the specified model. Configured with information relevant to the concurrent threads, the code-checking system can more accurately determine the presence or absence of defects in the implementation code. The specified model, resulting implemented code, and dynamic system can be complex and comply with a standardized software architecture, such as Automotive Open System Architecture (AUTOSAR).

Abstract: Methods and systems for using common property datatypes are described. In some embodiments, a system may receive an assignment statement a data structure comprising a first object of a first datatype, the first datatype one of multiple datatypes supporting a common property, the multiple datatypes representing the common property using differing native values, and a common property object of a common property datatype, the common property object representing the common property supported by the multiple datatype. The system can execute or interpret the subscripted assignment statement, converting the common property object into a second object of the first datatype, the second object having a first native value representing the common property for the first datatype. The system can assign the second object to a location of the first object in the data structure. The common property can be at least one of a maximum, minimum, missing, and default.

Abstract: In an embodiment, degree of comprehensibility of a graphical representation of a model is identified. The model is provided in a graphical modeling environment. The degree of comprehensibility of the graphical representation of model is identified based at least in part on one or more visual characteristics of one or more elements in the model. The one or more elements in the model include at least one of entities in the model, or relationships in the model. The degree of comprehensibility assigned to the model is communicated, for example, to a user.

Abstract: A device may connect to a physical device. A device may obtain a device description document relating to the physical device based on connecting to the physical device. The device may parse the device description document to identify one or more components of the physical device. The device may select, from a repository of generic textual model components, one or more generic textual model components corresponding to the physical device based on parsing the device description. The device may generate, based on selecting the one or more generic textual model components, a device driver model element that includes the one or more generic textual model components. The device driver model element may be used to control the physical device or receive information from the physical device. The device may provide, via a user interface, information identifying the device driver model element.