Abstract: A variable operational mode transceiver device formed with an integrated circuit having a semiconductor material substrate supporting a feedback oscillator having a signal power divider electrically coupled to said feedback oscillator output, and a signal frequency multiplier electrically coupled to said signal power divider. A signal mixer has a pair of inputs of which one is electrically coupled to that remaining one of said pair of outputs of said signal power divider.

Abstract: A feedback oscillator device formed with an integrated circuit having a semiconductor material substrate on a ground plane. The circuit has an amplifier having an input and an output is provided at least in part on said semiconductor material substrate. A directional coupler is used to couple the amplifier output signal to the amplifier input through a parallel separated transmission lines transfer system and a capacitor such as a varactor. The substrate can be of gallium arsenide.

Abstract: A feedback oscillator device formed with an integrated circuit having a semiconductor material substrate on a ground plane. The circuit has an amplifier having an input and an output is provided at least in part on said semiconductor material substrate. A directional coupler is used to couple the amplifier output signal to the amplifier input through a parallel separated transmission lines transfer system and a capacitor such as a varactor. The substrate can be of gallium arsenide.

Abstract: A high frequency signal source module includes a housing have a high-Q dielectric puck and a transition enclosure employing an antipodal finline transition. A circuit module connected to the high-Q puck includes an oscillator circuit that cooperates with the high-Q puck, and a frequency doubling circuit. In turn, the output of the frequency doubler is coupled to the antipodal finline transition, and thence to the output standard rectangular waveguide.

Abstract: A phase modulator for communication applications is constructed in so as to be easily implemented by way of MMIC technology. A phase modulator section is followed by a saturated amplifier section so as to provide substantially constant amplitude for all bits or states. The phase modulator section is a bi-phase shift keyed or quadrature-phase shift keyed modulator constructed in accordance with the present invention for discretely varying the phase of an input carrier signal between two or four possible phase states, respectively. The bi-phase shift keyed modulator includes at least a first pair of first and second transmission line segments and a pair of switches which each serve as a single-pole double-throw switch for operatively connecting one of the pair of transmission line segments between an input associated with the first switch, and an output associated with the second switch.

Abstract: A multifunction high frequency integrated circuit structure and circuit configuration includes a resonator or oscillator circuit coupled to a buffer amplifier by way of a stripline coupler. The resonator circuit includes an input terminating region which is coupled to three input terminating ports. A first one of the input terminating ports is coupled directly to the resonator for either being electrically connected to a selected signal source or load, a second one of the input terminating ports is electrically connected to either a fixed or variable potential source, and the remaining input terminating port is coupled to the resonator input terminating region through another stripline coupler, and is intended to be electrically connected to another selected signal source.

Abstract: An analog phase modulator is provided for linearly phase modulating a high carrier frequency input signal in proportion to an applied bias signal. A first variable reactance network, including at least a pair of variable reactance devices separated by an approximately 1/4 wave length transmission line segment, is capacitively coupled to an in-phase port of a power divider network, and a second identical variable reactance network is capacitively coupled to a quadrature phase shifted port of the power divider network. A bias source signal is applied to each of the first and second variable reactance networks through identical bias filters, each including a high impedance transmission line segment serially connected between the bias source and the variable reactance network, and a low impedance transmission line segment shunt segment at the juncture of the high impedance transmission line segment and the bias source input port.

Abstract: A non-destructive and non-invasive method for monitoring a selected characteristic of a fabricated semiconductor sample while inside a fabrication chamber and during the fabrication process, where selected materials are deposited on a planar surface of a wafer substrate in a fabrication chamber, employs one or more viewports in the walls of the fabrication chamber. A focused electromagnetic wave is generated external to the fabrication chamber, and directed through a viewport to impinge upon a selected portion of the planar surface of the wafer substrate at an oblique incident angle relative to the planar surface of the wafer substrate. In turn, a reflected electromagnetic wave emanating from the planar surface of the wafer substrate is detected. A signal processor then determines a reflection coefficient as a function of a selected characteristic of the focused electromagnetic wave and the reflected electromagnetic wave.

Abstract: A Germanium junction field effect transistor (Ge-JFET) is fabricated in a manner to produce low noise and which is particularly suitable for a cryogenic detector. The Ge-JFET in accordance with the present invention comprises a germanium base material on which a phosphorous implanted channel region is implanted thereon. A boron cap layer overlies the channel region. On the cap layer are separately spaced drain and source ohmic contact regions, and a gate ohmic contact region therebetween. The drain and source ohmic contact regions are separately spaced arsenic implant regions and a phosphorous implant region. The gate ohmic contact region is a BF.sub.2 implanted region.