Abstract: An information processing apparatus according to an embodiment includes an aligner that aligns, with reference to a reference data set that is a sequential data set, another sequential data set; and a target data extractor that extracts a portion of the another sequential data set corresponding to the reference data set as a target data set.

Abstract: When entering an idling state, a master unit M transmits an optical signal for polling addressed to each slave unit S-1 to S-n. The slave unit S-n located at the lowest rank of a direct chain constituted by S-1 to S-n, when receiving the optical signal for polling for the self unit, responds by transmitting an optical signal representing a phase correction request signal to the other slave units. The slave units S-1 to S-(n?1) respond to the phase correction request signal, and initialize each clock signal to synchronize with the clock signal of the slave unit S-n at the lowest rank.

Abstract: A memory device, performs fast data renewal and erasure, and is not easily degraded. In the memory area of a flash memory, each block is divided into physical pages and each physical pages is divided into logical pages. A redundancy portion is provided for each physical page. When supplied with to-be-written data and the logical address of a write destination, a CPU writes this data in an empty logical page and allocates the supplied logical address to this logical page. An old data flag in the redundancy portion in that physical page which includes a logical page having old data stored therein is changed in such a way as to indicate that data in this logical page is invalid. New data writing is done in that logical page to which a logical address is not allocated. At the time of flash-erasing a block, data which is stored in that logical page which is indicated by the old data flag is not transferred.

Abstract: Each of a plurality of storage devices (N?1 to N-n) has a plurality of memory blocks for storing data. A data writing apparatus obtains error information which represents good blocks which can store data correctly, from the plurality of storage devices (N?1 to N-n). The data writing apparatus determines a memory block in which data is to be written, in each of the plurality of storage devices (N?1 to N-n), based on the obtained error information. The data writing apparatus controls the plurality of storage devices (N?1 to N-n), and writes predetermined data in the determined memory blocks.

Abstract: Disclosed is a memory device which is not easily deteriorated and a memory managing method which does not easily deteriorate a memory device. A physical address is given to a memory area of a flash memory (11) page by page. When supplied with to-bewritten data and a logical address where the data is to be written, a CPU (121) writes this data in a page indicated by a write pointer. The correlation between the physical address and the logical address of the page is stored in a RAM (123) in the form of BPT (Block Pointer Table). At the time of reading, the CPU (121) that has been supplied with the logical address searches the BPT to specify a physical address associated with that logical address and reads data from that page which is given the specified physical address. Flash erasing of a block is executed when the number of empty blocks becomes equal to or smaller than a predetermined number.

Abstract: A first storage unit is accessed randomly in a unit equal to or greater than a predetermined data unit. The first storage unit stores a target program required to be read randomly in a unit smaller than the data unit to execute. A second storage unit stores a reading program for reading the target program from the first storage unit. A control unit reads the target program from the first storage unit according to the reading program of the second storage unit. The control unit stores the read target program to a third storage unit that can be accessed in a unit smaller than the data unit. The control unit executes the target program stored in the third storage unit to gain access randomly to the first storage unit in a unit smaller than the data unit in a quasi manner.

Abstract: A skill determination method, a skill determination system, a skill determination server, a skill determination client and a skill determination evaluation board are disclosed for objectively determine one or more skills of a user as a design engineer without use of much time and cost. The skill determination method includes steps of: supplying a question file to determine one or more skills of a user from a skill determination server to a skill determination client; providing one or more answers to the question file to the skill determination client through input manipulation of the user and supplying an answer file corresponding to the answers from the skill determination client to the skill determination server; and evaluating knowledge of the user based on a comparison result between the answer file and a correct answer file corresponding to the question file and determining the skills of the user by using the skill determination server.

Abstract: A computer supplies an enable command and a password to a controller after a memory card is attached to the computer. The controller allows acceptance of an access command if the supplied enable command and password coincide with those stored in a flash memory, or refuses the acceptance of the access command if the supplied enable command and password differ from those stored in the flash memory. The controller updates the enable command and password if a password setting command and newly prepared enable command and password are supplied to the controller from the computer during access command accept mode. The controller refuses the access command if the computer supplies to the controller a correct enable command but a wrong password during the access command accept mode.

Abstract: A storage medium control method carried out in a storage medium control device, inserted between a storage medium and a host apparatus accessing the storage medium, is provided. The method controls signal lines connected between the storage medium control device and the storage medium in a detachable manner, and the timing of signals on the signal lines. In the method, functional information of the signal lines used to control the storage medium and state information of the signals on the signal lines are read from first storage means, in accordance with the type of the storage medium. Then, the timing of the signals passing between the storage medium and the storage medium control device is controlled based on an operation clock and the state information, in response to an operation request supplied from the host apparatus.

Abstract: When a storage medium is set in a control unit, a controller reads out device ID data, CIS data and Identify-Drive data from the storage medium. Based on the device ID data and the CIS data, the controller authenticates the storage medium and stores the Identify-Drive data. A CPU in the controller reads out replacement Identify-Drive data from a storage section in response to a command from a computer. Using the replacement Identify-Drive data, the CPU updates the Identify-Drive data stored in the controller. Hereafter the controller accesses the storage medium in accordance with conditions represented by the updated Identify-Drive data.

Abstract: A flash memory includes an encoded cryptographic key “k” stored therein. A protected ROM, an external access to which is inhibited, includes a decoding program stored therein to decode the cryptographic key “k”. The cryptographic key “k” is decoded by using the decoding program. With the cryptographic key “k” as decoded, data is encrypted and stored in the flash memory. Data read out from the flash memory is output after decrypted with the cryptographic key “k.” In order to check an area having the decoding program stored therein, data which forms the decoding program is processed by using a hash function stored in the ROM, and a processing result and an expected value are compared with each other. When the processing result and the expected value matches with each other, the aforementioned area is determined as being in a normal condition.

Abstract: A CPU creates a file management BSI and a file management BPT in a zone 0 included in a flash memory storing directories and an FAT, and stores the created BSI and BPT in an SRAM. In response to a command from a computer to read data, the CPU specifies and reads positions of the directories and the FAT based on the file management BPT, and sends the computer with the read data. When accessing data belong to any zone other than the zone 0, the CPU creates a general BPT again, but does not update the file management BPT. Even if data which has previously been accessed belongs to any zone, the directories and the FAT can be accessed without creating the BPT again. Updating of the directories and the FAT can be also achieved without creating the BSI again.

Abstract: In order to access a memory cell array (1), an address translation table which stores a correspondence between logical and physical addresses, and an empty block table which specifies locations of empty blocks, are stored in an arbitrary block of the memory cell array (1) itself. In the case of reading data from the memory cell array (1), a physical address to read data is attained with reference to the address translation table stored in the memory cell array (1). Meanwhile, in the case of writing data, an empty block is detected from the empty block table stored in the memory cell array (1), and data is written in the empty block. Moreover, the address translation table and the empty block table which have been updated are written in another empty block.

Abstract: A storage device (10) has a flash memory (11), a controller (16) and a second ROM (15). In the flash memory (11), a data key is stored, which is a key unique to each storage device (10). In the second ROM (15), a system key is stored which is an encrypting key common to storage devices (10). The controller (16), when writing data, encrypts the data with the data and system keys and writes the encrypted data in the flash memory (11), and when reading data, decrypts the data with the data and system keys to output the decrypted data. The data key may be encrypted with the system key. In this case, when to write data, the controller (16) may decrypt the data key with the system key, and encrypt data with the decrypted key, and when to read data, the controller may decrypt the data key with the system key, and decrypt the encrypted data with the decrypted data key.

Abstract: When a storage section is installed in a controller and the controller is installed in an access device, the controller reads out device ID data and CIS data from the storage section, and certifies the storage section based on the device ID data and the CIS data. Upon completion of the certification of the storage section, the controller reads out boot data and a code key therefrom, and supplies the access device with the read boot data and code key. Subsequently, the access device decodes general data read out from the storage section via the controller, using the code key, and encodes data to be stored using the code key, and writes the encoded data in the storage section via the controller.

Abstract: A data processing system is provided with a flash memory including a plurality of blocks and capable of erasing stored data collectively in units of block and a memory control unit for accessing the flash memory, the memory control unit having a control circuit for formatting the flash memory according to a format information for substantially coinciding each cluster serving as a logical unit of memory region of the flash memory with integer ones of the blocks and a control circuit for determining a size and position of each cluster and carrying out access control for erasing, write-in and reading of data of the flash memory according to the size and position of the determined cluster.

Abstract: A data processing system is provided with a flash memory including a plurality of blocks and capable of erasing stored data collectively in units of block and a memory control unit for accessing the flash memory, the memory control unit having a control circuit for formatting the flash memory according to a format information for substantially coinciding each cluster serving as a logical unit of memory region of the flash memory with integer ones of the blocks and a control circuit for determining a size and position of each cluster and carrying out access control for erasing, write-in and reading of data of the flash memory according to the size and position of the determined cluster.

Abstract: A flash memory card includes one or a plurality of flash memories and a controller having an interface connected to a host computer to store card attribute information to be presented to the host computer at a predetermined storage position in the flash memory.

Abstract: A recording medium in which a purchased image protected by a copyright or the like has been stored and a recording medium in which a user image has been stored is set, the purchased image as encrypted is decrypted and the images stored in both mediums are processed. The ID of a created image, user image data, link information representing encrypted purchased image data or the storage location of the purchased image data, and data specifying an image processing mode and the number of prints, are stored in a recording medium. In a DPE shop or the like, the purchased image data stored in the recording medium is decrypted, and the image processed by the user is reconstructed and printed in accordance with the data stored in the recording medium. A management center may give the allowance of use of the purchased image to the DPE shop, and the management center draws royalties from the accounts of individual DPE shops, sums the royalties and pays them into the accounts of individual proprietors of rights.

Abstract: In order to access a memory card of the ATA specification, a computer generates a command based on the USB. A conversion controller in a reader/writer receives the command and converts it into a command of the ATA specification and supplies it to a controller of the ATA specification. The controller accesses the memory card based on the command of the ATA specification thus supplied. The conversion controller converts the formats of the data of the USB specification and the data of the ATA specification to each other. Consequently, the computer can access the memory card of the ATA specification constituting a conventional standard product using the USB of serial communication smaller in the area occupied by the connector.